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stm32: can: fd: implement bus-off recovery

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as per RM0492 and other relevant RMs, bus-off recovery is not automatic.
CCCR.INIT is set by the device upon bus-off; the CPU must reset
CCCR.INIT to initiate the recovery.
This commit is contained in:
Torin Cooper-Bennun 2024-04-17 14:58:08 +01:00
parent 901bdfc7b8
commit 80b3db4ea6
2 changed files with 9 additions and 0 deletions
embassy-stm32/src/can
fd
peripheral.rs
fdcan.rs

1
embassy-stm32/src/can/fd/peripheral.rs
View file

@ -368,6 +368,7 @@ impl Registers {
w.set_rfne(0, true); // Rx Fifo 0 New Msg w.set_rfne(0, true); // Rx Fifo 0 New Msg
w.set_rfne(1, true); // Rx Fifo 1 New Msg w.set_rfne(1, true); // Rx Fifo 1 New Msg
w.set_tce(true); // Tx Complete w.set_tce(true); // Tx Complete
w.set_boe(true); // Bus-Off Status Changed
}); });
self.regs.ile().modify(|w| { self.regs.ile().modify(|w| {
w.set_eint0(true); // Interrupt Line 0 w.set_eint0(true); // Interrupt Line 0

8
embassy-stm32/src/can/fdcan.rs
View file

@ -81,6 +81,14 @@ impl<T: Instance> interrupt::typelevel::Handler<T::IT0Interrupt> for IT0Interrup
if ir.rfn(1) { if ir.rfn(1) {
T::state().rx_mode.on_interrupt::<T>(1); T::state().rx_mode.on_interrupt::<T>(1);
} }
if ir.bo() {
regs.ir().write(|w| w.set_bo(true));
if regs.psr().read().bo() {
// Initiate bus-off recovery sequence by resetting CCCR.INIT
regs.cccr().modify(|w| w.set_init(false));
}
}
} }
} }