Merge #933
933: embassy-rp: Add async SPI r=Dirbaio a=kalkyl Co-authored-by: Henrik Alsér <henrik.alser@me.com> Co-authored-by: Henrik Alsér <henrik@mindbite.se>
This commit is contained in:
bors[bot]
GitHub
commit
835b69456d
7 changed files with 373 additions and 58 deletions
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@ -40,10 +40,10 @@ pub(crate) unsafe fn init() {
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pub unsafe fn read<'a, C: Channel, W: Word>(
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ch: impl Peripheral<P = C> + 'a,
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from: *const W,
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to: &mut [W],
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to: *mut [W],
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dreq: u8,
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) -> Transfer<'a, C> {
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let (to_ptr, len) = crate::dma::slice_ptr_parts_mut(to);
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let (to_ptr, len) = crate::dma::slice_ptr_parts(to);
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copy_inner(
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ch,
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from as *const u32,
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@ -58,7 +58,7 @@ pub unsafe fn read<'a, C: Channel, W: Word>(
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pub unsafe fn write<'a, C: Channel, W: Word>(
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ch: impl Peripheral<P = C> + 'a,
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from: &[W],
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from: *const [W],
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to: *mut W,
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dreq: u8,
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) -> Transfer<'a, C> {
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@ -1,7 +1,11 @@
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use core::marker::PhantomData;
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use embassy_embedded_hal::SetConfig;
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use embassy_hal_common::{into_ref, PeripheralRef};
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pub use embedded_hal_02::spi::{Phase, Polarity};
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use futures::future::join;
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use crate::dma::{AnyChannel, Channel};
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use crate::gpio::sealed::Pin as _;
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use crate::gpio::{AnyPin, Pin as GpioPin};
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use crate::{pac, peripherals, Peripheral};
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@ -30,8 +34,11 @@ impl Default for Config {
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}
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}
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pub struct Spi<'d, T: Instance> {
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pub struct Spi<'d, T: Instance, M: Mode> {
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inner: PeripheralRef<'d, T>,
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tx_dma: Option<PeripheralRef<'d, AnyChannel>>,
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rx_dma: Option<PeripheralRef<'d, AnyChannel>>,
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phantom: PhantomData<(&'d mut T, M)>,
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}
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fn div_roundup(a: u32, b: u32) -> u32 {
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@ -57,51 +64,15 @@ fn calc_prescs(freq: u32) -> (u8, u8) {
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((presc * 2) as u8, (postdiv - 1) as u8)
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}
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impl<'d, T: Instance> Spi<'d, T> {
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pub fn new(
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inner: impl Peripheral<P = T> + 'd,
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clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
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miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
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config: Config,
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) -> Self {
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into_ref!(clk, mosi, miso);
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Self::new_inner(
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inner,
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Some(clk.map_into()),
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Some(mosi.map_into()),
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Some(miso.map_into()),
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None,
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config,
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)
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}
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pub fn new_txonly(
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inner: impl Peripheral<P = T> + 'd,
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clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
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config: Config,
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) -> Self {
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into_ref!(clk, mosi);
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Self::new_inner(inner, Some(clk.map_into()), Some(mosi.map_into()), None, None, config)
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}
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pub fn new_rxonly(
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inner: impl Peripheral<P = T> + 'd,
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clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
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miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
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config: Config,
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) -> Self {
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into_ref!(clk, miso);
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Self::new_inner(inner, Some(clk.map_into()), None, Some(miso.map_into()), None, config)
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}
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impl<'d, T: Instance, M: Mode> Spi<'d, T, M> {
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fn new_inner(
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inner: impl Peripheral<P = T> + 'd,
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clk: Option<PeripheralRef<'d, AnyPin>>,
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mosi: Option<PeripheralRef<'d, AnyPin>>,
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miso: Option<PeripheralRef<'d, AnyPin>>,
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cs: Option<PeripheralRef<'d, AnyPin>>,
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tx_dma: Option<PeripheralRef<'d, AnyChannel>>,
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rx_dma: Option<PeripheralRef<'d, AnyChannel>>,
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config: Config,
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) -> Self {
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into_ref!(inner);
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@ -134,7 +105,12 @@ impl<'d, T: Instance> Spi<'d, T> {
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pin.io().ctrl().write(|w| w.set_funcsel(1));
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}
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}
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Self { inner }
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Self {
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inner,
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tx_dma,
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rx_dma,
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phantom: PhantomData,
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}
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}
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pub fn blocking_write(&mut self, data: &[u8]) -> Result<(), Error> {
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@ -225,19 +201,214 @@ impl<'d, T: Instance> Spi<'d, T> {
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}
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}
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impl<'d, T: Instance> Spi<'d, T, Blocking> {
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pub fn new_blocking(
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inner: impl Peripheral<P = T> + 'd,
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clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
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miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
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config: Config,
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) -> Self {
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into_ref!(clk, mosi, miso);
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Self::new_inner(
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inner,
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Some(clk.map_into()),
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Some(mosi.map_into()),
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Some(miso.map_into()),
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None,
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None,
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None,
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config,
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)
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}
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pub fn new_blocking_txonly(
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inner: impl Peripheral<P = T> + 'd,
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clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
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config: Config,
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) -> Self {
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into_ref!(clk, mosi);
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Self::new_inner(
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inner,
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Some(clk.map_into()),
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Some(mosi.map_into()),
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None,
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None,
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None,
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None,
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config,
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)
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}
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pub fn new_blocking_rxonly(
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inner: impl Peripheral<P = T> + 'd,
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clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
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miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
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config: Config,
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) -> Self {
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into_ref!(clk, miso);
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Self::new_inner(
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inner,
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Some(clk.map_into()),
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None,
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Some(miso.map_into()),
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None,
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None,
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None,
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config,
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)
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}
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}
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impl<'d, T: Instance> Spi<'d, T, Async> {
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pub fn new(
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inner: impl Peripheral<P = T> + 'd,
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clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
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miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
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tx_dma: impl Peripheral<P = impl Channel> + 'd,
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rx_dma: impl Peripheral<P = impl Channel> + 'd,
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config: Config,
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) -> Self {
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into_ref!(tx_dma, rx_dma, clk, mosi, miso);
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Self::new_inner(
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inner,
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Some(clk.map_into()),
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Some(mosi.map_into()),
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Some(miso.map_into()),
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None,
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Some(tx_dma.map_into()),
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Some(rx_dma.map_into()),
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config,
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)
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}
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pub fn new_txonly(
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inner: impl Peripheral<P = T> + 'd,
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clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
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tx_dma: impl Peripheral<P = impl Channel> + 'd,
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config: Config,
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) -> Self {
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into_ref!(tx_dma, clk, mosi);
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Self::new_inner(
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inner,
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Some(clk.map_into()),
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Some(mosi.map_into()),
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None,
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None,
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Some(tx_dma.map_into()),
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None,
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config,
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)
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}
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pub fn new_rxonly(
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inner: impl Peripheral<P = T> + 'd,
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clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
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miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
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rx_dma: impl Peripheral<P = impl Channel> + 'd,
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config: Config,
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) -> Self {
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into_ref!(rx_dma, clk, miso);
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Self::new_inner(
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inner,
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Some(clk.map_into()),
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None,
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Some(miso.map_into()),
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None,
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None,
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Some(rx_dma.map_into()),
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config,
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)
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}
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pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> {
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let ch = self.tx_dma.as_mut().unwrap();
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let transfer = unsafe {
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self.inner.regs().dmacr().modify(|reg| {
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reg.set_txdmae(true);
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});
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// If we don't assign future to a variable, the data register pointer
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// is held across an await and makes the future non-Send.
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crate::dma::write(ch, buffer, self.inner.regs().dr().ptr() as *mut _, T::TX_DREQ)
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};
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transfer.await;
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Ok(())
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}
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pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
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let ch = self.rx_dma.as_mut().unwrap();
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let transfer = unsafe {
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self.inner.regs().dmacr().modify(|reg| {
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reg.set_rxdmae(true);
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});
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// If we don't assign future to a variable, the data register pointer
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// is held across an await and makes the future non-Send.
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crate::dma::read(ch, self.inner.regs().dr().ptr() as *const _, buffer, T::RX_DREQ)
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};
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transfer.await;
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Ok(())
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}
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pub async fn transfer(&mut self, rx_buffer: &mut [u8], tx_buffer: &[u8]) -> Result<(), Error> {
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self.transfer_inner(rx_buffer, tx_buffer).await
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}
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pub async fn transfer_in_place(&mut self, words: &mut [u8]) -> Result<(), Error> {
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self.transfer_inner(words, words).await
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}
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async fn transfer_inner(&mut self, rx_ptr: *mut [u8], tx_ptr: *const [u8]) -> Result<(), Error> {
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let (_, from_len) = crate::dma::slice_ptr_parts(tx_ptr);
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let (_, to_len) = crate::dma::slice_ptr_parts_mut(rx_ptr);
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assert_eq!(from_len, to_len);
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let tx_ch = self.tx_dma.as_mut().unwrap();
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let tx_transfer = unsafe {
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self.inner.regs().dmacr().modify(|reg| {
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reg.set_txdmae(true);
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});
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// If we don't assign future to a variable, the data register pointer
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// is held across an await and makes the future non-Send.
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crate::dma::write(tx_ch, tx_ptr, self.inner.regs().dr().ptr() as *mut _, T::TX_DREQ)
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};
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let rx_ch = self.rx_dma.as_mut().unwrap();
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let rx_transfer = unsafe {
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self.inner.regs().dmacr().modify(|reg| {
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reg.set_rxdmae(true);
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});
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// If we don't assign future to a variable, the data register pointer
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// is held across an await and makes the future non-Send.
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crate::dma::read(rx_ch, self.inner.regs().dr().ptr() as *const _, rx_ptr, T::RX_DREQ)
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};
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join(tx_transfer, rx_transfer).await;
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Ok(())
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}
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}
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mod sealed {
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use super::*;
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pub trait Mode {}
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pub trait Instance {
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const TX_DREQ: u8;
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const RX_DREQ: u8;
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fn regs(&self) -> pac::spi::Spi;
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}
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}
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pub trait Mode: sealed::Mode {}
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pub trait Instance: sealed::Instance {}
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macro_rules! impl_instance {
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($type:ident, $irq:ident) => {
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($type:ident, $irq:ident, $tx_dreq:expr, $rx_dreq:expr) => {
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impl sealed::Instance for peripherals::$type {
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const TX_DREQ: u8 = $tx_dreq;
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const RX_DREQ: u8 = $rx_dreq;
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fn regs(&self) -> pac::spi::Spi {
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pac::$type
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}
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@ -246,8 +417,8 @@ macro_rules! impl_instance {
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};
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}
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impl_instance!(SPI0, Spi0);
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impl_instance!(SPI1, Spi1);
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impl_instance!(SPI0, Spi0, 16, 17);
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impl_instance!(SPI1, Spi1, 18, 19);
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pub trait ClkPin<T: Instance>: GpioPin {}
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pub trait CsPin<T: Instance>: GpioPin {}
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@ -281,12 +452,25 @@ impl_pin!(PIN_17, SPI0, CsPin);
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impl_pin!(PIN_18, SPI0, ClkPin);
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impl_pin!(PIN_19, SPI0, MosiPin);
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macro_rules! impl_mode {
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($name:ident) => {
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impl sealed::Mode for $name {}
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impl Mode for $name {}
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};
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}
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pub struct Blocking;
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pub struct Async;
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impl_mode!(Blocking);
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impl_mode!(Async);
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// ====================
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mod eh02 {
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use super::*;
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impl<'d, T: Instance> embedded_hal_02::blocking::spi::Transfer<u8> for Spi<'d, T> {
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impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::spi::Transfer<u8> for Spi<'d, T, M> {
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type Error = Error;
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fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
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self.blocking_transfer_in_place(words)?;
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@ -294,7 +478,7 @@ mod eh02 {
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}
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}
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impl<'d, T: Instance> embedded_hal_02::blocking::spi::Write<u8> for Spi<'d, T> {
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impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::spi::Write<u8> for Spi<'d, T, M> {
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type Error = Error;
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fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
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@ -313,29 +497,29 @@ mod eh1 {
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}
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}
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impl<'d, T: Instance> embedded_hal_1::spi::ErrorType for Spi<'d, T> {
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impl<'d, T: Instance, M: Mode> embedded_hal_1::spi::ErrorType for Spi<'d, T, M> {
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type Error = Error;
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}
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impl<'d, T: Instance> embedded_hal_1::spi::blocking::SpiBusFlush for Spi<'d, T> {
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impl<'d, T: Instance, M: Mode> embedded_hal_1::spi::blocking::SpiBusFlush for Spi<'d, T, M> {
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fn flush(&mut self) -> Result<(), Self::Error> {
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Ok(())
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}
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}
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impl<'d, T: Instance> embedded_hal_1::spi::blocking::SpiBusRead<u8> for Spi<'d, T> {
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impl<'d, T: Instance, M: Mode> embedded_hal_1::spi::blocking::SpiBusRead<u8> for Spi<'d, T, M> {
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fn read(&mut self, words: &mut [u8]) -> Result<(), Self::Error> {
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self.blocking_transfer(words, &[])
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}
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}
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impl<'d, T: Instance> embedded_hal_1::spi::blocking::SpiBusWrite<u8> for Spi<'d, T> {
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impl<'d, T: Instance, M: Mode> embedded_hal_1::spi::blocking::SpiBusWrite<u8> for Spi<'d, T, M> {
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fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
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self.blocking_write(words)
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}
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}
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impl<'d, T: Instance> embedded_hal_1::spi::blocking::SpiBus<u8> for Spi<'d, T> {
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impl<'d, T: Instance, M: Mode> embedded_hal_1::spi::blocking::SpiBus<u8> for Spi<'d, T, M> {
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fn transfer(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Self::Error> {
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self.blocking_transfer(read, write)
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}
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@ -346,7 +530,52 @@ mod eh1 {
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}
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}
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impl<'d, T: Instance> SetConfig for Spi<'d, T> {
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#[cfg(all(feature = "unstable-traits", feature = "nightly"))]
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mod eha {
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use core::future::Future;
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use super::*;
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impl<'d, T: Instance> embedded_hal_async::spi::SpiBusFlush for Spi<'d, T, Async> {
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type FlushFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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|
||||
fn flush<'a>(&'a mut self) -> Self::FlushFuture<'a> {
|
||||
async { Ok(()) }
|
||||
}
|
||||
}
|
||||
|
||||
impl<'d, T: Instance> embedded_hal_async::spi::SpiBusWrite<u8> for Spi<'d, T, Async> {
|
||||
type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
||||
|
||||
fn write<'a>(&'a mut self, data: &'a [u8]) -> Self::WriteFuture<'a> {
|
||||
self.write(data)
|
||||
}
|
||||
}
|
||||
|
||||
impl<'d, T: Instance> embedded_hal_async::spi::SpiBusRead<u8> for Spi<'d, T, Async> {
|
||||
type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
||||
|
||||
fn read<'a>(&'a mut self, data: &'a mut [u8]) -> Self::ReadFuture<'a> {
|
||||
self.read(data)
|
||||
}
|
||||
}
|
||||
|
||||
impl<'d, T: Instance> embedded_hal_async::spi::SpiBus<u8> for Spi<'d, T, Async> {
|
||||
type TransferFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
||||
|
||||
fn transfer<'a>(&'a mut self, rx: &'a mut [u8], tx: &'a [u8]) -> Self::TransferFuture<'a> {
|
||||
self.transfer(rx, tx)
|
||||
}
|
||||
|
||||
type TransferInPlaceFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
|
||||
|
||||
fn transfer_in_place<'a>(&'a mut self, words: &'a mut [u8]) -> Self::TransferInPlaceFuture<'a> {
|
||||
self.transfer_in_place(words)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl<'d, T: Instance, M: Mode> SetConfig for Spi<'d, T, M> {
|
||||
type Config = Config;
|
||||
fn set_config(&mut self, config: &Self::Config) {
|
||||
let p = self.inner.regs();
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@ async fn main(_spawner: Spawner) {
|
|||
// create SPI
|
||||
let mut config = spi::Config::default();
|
||||
config.frequency = 2_000_000;
|
||||
let mut spi = Spi::new(p.SPI1, clk, mosi, miso, config);
|
||||
let mut spi = Spi::new_blocking(p.SPI1, clk, mosi, miso, config);
|
||||
|
||||
// Configure CS
|
||||
let mut cs = Output::new(touch_cs, Level::Low);
|
||||
|
|
|
|||
29
examples/rp/src/bin/spi_async.rs
Normal file
29
examples/rp/src/bin/spi_async.rs
Normal file
|
|
@ -0,0 +1,29 @@
|
|||
#![no_std]
|
||||
#![no_main]
|
||||
#![feature(type_alias_impl_trait)]
|
||||
|
||||
use defmt::*;
|
||||
use embassy_executor::Spawner;
|
||||
use embassy_rp::spi::{Config, Spi};
|
||||
use embassy_time::{Duration, Timer};
|
||||
use {defmt_rtt as _, panic_probe as _};
|
||||
|
||||
#[embassy_executor::main]
|
||||
async fn main(_spawner: Spawner) {
|
||||
let p = embassy_rp::init(Default::default());
|
||||
info!("Hello World!");
|
||||
|
||||
let miso = p.PIN_12;
|
||||
let mosi = p.PIN_11;
|
||||
let clk = p.PIN_10;
|
||||
|
||||
let mut spi = Spi::new(p.SPI1, clk, mosi, miso, p.DMA_CH0, p.DMA_CH1, Config::default());
|
||||
|
||||
loop {
|
||||
let tx_buf = [1_u8, 2, 3, 4, 5, 6];
|
||||
let mut rx_buf = [0_u8; 6];
|
||||
spi.transfer(&mut rx_buf, &tx_buf).await.unwrap();
|
||||
info!("{:?}", rx_buf);
|
||||
Timer::after(Duration::from_secs(1)).await;
|
||||
}
|
||||
}
|
||||
|
|
@ -8,7 +8,7 @@ use defmt::*;
|
|||
use embassy_executor::Spawner;
|
||||
use embassy_rp::gpio::{Level, Output};
|
||||
use embassy_rp::spi;
|
||||
use embassy_rp::spi::Spi;
|
||||
use embassy_rp::spi::{Blocking, Spi};
|
||||
use embassy_time::Delay;
|
||||
use embedded_graphics::image::{Image, ImageRawLE};
|
||||
use embedded_graphics::mono_font::ascii::FONT_10X20;
|
||||
|
|
@ -48,7 +48,8 @@ async fn main(_spawner: Spawner) {
|
|||
config.phase = spi::Phase::CaptureOnSecondTransition;
|
||||
config.polarity = spi::Polarity::IdleHigh;
|
||||
|
||||
let spi_bus = RefCell::new(Spi::new(p.SPI1, clk, mosi, miso, config));
|
||||
let spi: Spi<'_, _, Blocking> = Spi::new_blocking(p.SPI1, clk, mosi, miso, config);
|
||||
let spi_bus = RefCell::new(spi);
|
||||
|
||||
let display_spi = SpiDeviceWithCs::new(&spi_bus, Output::new(display_cs, Level::High));
|
||||
let touch_spi = SpiDeviceWithCs::new(&spi_bus, Output::new(touch_cs, Level::High));
|
||||
|
|
|
|||
28
tests/rp/src/bin/spi.rs
Normal file
28
tests/rp/src/bin/spi.rs
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
#![no_std]
|
||||
#![no_main]
|
||||
#![feature(type_alias_impl_trait)]
|
||||
|
||||
use defmt::{assert_eq, *};
|
||||
use embassy_executor::Spawner;
|
||||
use embassy_rp::spi::{Config, Spi};
|
||||
use {defmt_rtt as _, panic_probe as _};
|
||||
|
||||
#[embassy_executor::main]
|
||||
async fn main(_spawner: Spawner) {
|
||||
let p = embassy_rp::init(Default::default());
|
||||
info!("Hello World!");
|
||||
|
||||
let clk = p.PIN_2;
|
||||
let mosi = p.PIN_3;
|
||||
let miso = p.PIN_4;
|
||||
|
||||
let mut spi = Spi::new_blocking(p.SPI0, clk, mosi, miso, Config::default());
|
||||
|
||||
let tx_buf = [1_u8, 2, 3, 4, 5, 6];
|
||||
let mut rx_buf = [0_u8; 6];
|
||||
spi.blocking_transfer(&mut rx_buf, &tx_buf).unwrap();
|
||||
assert_eq!(rx_buf, tx_buf);
|
||||
|
||||
info!("Test OK");
|
||||
cortex_m::asm::bkpt();
|
||||
}
|
||||
28
tests/rp/src/bin/spi_async.rs
Normal file
28
tests/rp/src/bin/spi_async.rs
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
#![no_std]
|
||||
#![no_main]
|
||||
#![feature(type_alias_impl_trait)]
|
||||
|
||||
use defmt::{assert_eq, *};
|
||||
use embassy_executor::Spawner;
|
||||
use embassy_rp::spi::{Config, Spi};
|
||||
use {defmt_rtt as _, panic_probe as _};
|
||||
|
||||
#[embassy_executor::main]
|
||||
async fn main(_spawner: Spawner) {
|
||||
let p = embassy_rp::init(Default::default());
|
||||
info!("Hello World!");
|
||||
|
||||
let clk = p.PIN_2;
|
||||
let mosi = p.PIN_3;
|
||||
let miso = p.PIN_4;
|
||||
|
||||
let mut spi = Spi::new(p.SPI0, clk, mosi, miso, p.DMA_CH0, p.DMA_CH1, Config::default());
|
||||
|
||||
let tx_buf = [1_u8, 2, 3, 4, 5, 6];
|
||||
let mut rx_buf = [0_u8; 6];
|
||||
spi.transfer(&mut rx_buf, &tx_buf).await.unwrap();
|
||||
assert_eq!(rx_buf, tx_buf);
|
||||
|
||||
info!("Test OK");
|
||||
cortex_m::asm::bkpt();
|
||||
}
|
||||
Loading…
Reference in a new issue