add RNG conditioning
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@ -31,6 +31,7 @@ impl<'d, T: Instance> Rng<'d, T> {
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random
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}
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#[cfg(rng_v1)]
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pub fn reset(&mut self) {
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// rng_v2 locks up on seed error, needs reset
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#[cfg(rng_v2)]
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@ -49,6 +50,38 @@ impl<'d, T: Instance> Rng<'d, T> {
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let _ = self.next_u32();
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}
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#[cfg(not(rng_v1))]
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pub fn reset(&mut self) {
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T::regs().cr().modify(|reg| {
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reg.set_rngen(false);
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reg.set_condrst(true);
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// set RNG config "A" according to reference manual
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// this has to be written within the same write access as setting the CONDRST bit
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reg.set_nistc(pac::rng::vals::Nistc::DEFAULT);
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reg.set_rng_config1(pac::rng::vals::RngConfig1::CONFIGA);
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reg.set_rng_config2(pac::rng::vals::RngConfig2::CONFIGA_B);
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reg.set_rng_config3(pac::rng::vals::RngConfig3::CONFIGA);
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reg.set_clkdiv(pac::rng::vals::Clkdiv::NODIV);
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});
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// wait for CONDRST to be set
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while !T::regs().cr().read().condrst() {}
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// magic number must be written immediately before every read or write access to HTCR
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T::regs().htcr().write(|w| w.set_htcfg(pac::rng::vals::Htcfg::MAGIC));
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// write recommended value according to reference manual
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// note: HTCR can only be written during conditioning
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T::regs()
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.htcr()
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.write(|w| w.set_htcfg(pac::rng::vals::Htcfg::RECOMMENDED));
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// finish conditioning
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T::regs().cr().modify(|reg| {
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reg.set_rngen(true);
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reg.set_condrst(false);
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reg.set_ie(true);
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});
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// wait for CONDRST to be reset
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while T::regs().cr().read().condrst() {}
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}
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pub async fn async_fill_bytes(&mut self, dest: &mut [u8]) -> Result<(), Error> {
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T::regs().cr().modify(|reg| {
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reg.set_rngen(true);
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