fix(nrf/spim): use OutputDrive to set pin drives

This commit is contained in:
NBonaparte 2024-02-19 17:46:25 -08:00
parent 6ecac3bc95
commit ba2b4aad81
2 changed files with 17 additions and 38 deletions

View file

@ -189,7 +189,7 @@ impl<'d> Output<'d> {
} }
} }
fn convert_drive(drive: OutputDrive) -> DRIVE_A { pub(crate) fn convert_drive(drive: OutputDrive) -> DRIVE_A {
match drive { match drive {
OutputDrive::Standard => DRIVE_A::S0S1, OutputDrive::Standard => DRIVE_A::S0S1,
OutputDrive::HighDrive0Standard1 => DRIVE_A::H0S1, OutputDrive::HighDrive0Standard1 => DRIVE_A::H0S1,

View file

@ -15,7 +15,7 @@ pub use pac::spim0::frequency::FREQUENCY_A as Frequency;
use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE};
use crate::gpio::sealed::Pin as _; use crate::gpio::sealed::Pin as _;
use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; use crate::gpio::{self, convert_drive, AnyPin, OutputDrive, Pin as GpioPin, PselBits};
use crate::interrupt::typelevel::Interrupt; use crate::interrupt::typelevel::Interrupt;
use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut};
use crate::{interrupt, pac, Peripheral}; use crate::{interrupt, pac, Peripheral};
@ -51,14 +51,14 @@ pub struct Config {
/// this byte will be transmitted in the MOSI line for the left-over bytes. /// this byte will be transmitted in the MOSI line for the left-over bytes.
pub orc: u8, pub orc: u8,
/// Enable high drive for the SCK line. /// Drive strength for the SCK line.
pub sck_high_drive: bool, pub sck_drive: OutputDrive,
/// Enable high drive for the MOSI line. /// Drive strength for the MOSI line.
pub mosi_high_drive: bool, pub mosi_drive: OutputDrive,
/// Enable high drive for the MISO line. /// Drive strength for the MISO line.
pub miso_high_drive: bool, pub miso_drive: OutputDrive,
} }
impl Default for Config { impl Default for Config {
@ -68,9 +68,9 @@ impl Default for Config {
mode: MODE_0, mode: MODE_0,
bit_order: BitOrder::MSB_FIRST, bit_order: BitOrder::MSB_FIRST,
orc: 0x00, orc: 0x00,
sck_high_drive: false, sck_drive: OutputDrive::HighDrive,
mosi_high_drive: false, mosi_drive: OutputDrive::HighDrive,
miso_high_drive: false, miso_drive: OutputDrive::HighDrive,
} }
} }
} }
@ -171,37 +171,16 @@ impl<'d, T: Instance> Spim<'d, T> {
// Configure pins // Configure pins
if let Some(sck) = &sck { if let Some(sck) = &sck {
sck.conf().write(|w| { sck.conf()
w.dir().output(); .write(|w| w.dir().output().drive().variant(convert_drive(config.sck_drive)));
if config.sck_high_drive {
w.drive().h0h1();
} else {
w.drive().s0s1();
}
w
});
} }
if let Some(mosi) = &mosi { if let Some(mosi) = &mosi {
mosi.conf().write(|w| { mosi.conf()
w.dir().output(); .write(|w| w.dir().output().drive().variant(convert_drive(config.mosi_drive)));
if config.mosi_high_drive {
w.drive().h0h1();
} else {
w.drive().s0s1();
}
w
});
} }
if let Some(miso) = &miso { if let Some(miso) = &miso {
miso.conf().write(|w| { miso.conf()
w.input().connect(); .write(|w| w.input().connect().drive().variant(convert_drive(config.miso_drive)));
if config.miso_high_drive {
w.drive().h0h1();
} else {
w.drive().s0s1();
}
w
});
} }
match config.mode.polarity { match config.mode.polarity {