stm32g4: PLL: Add support for configuring PLL_P and PLL_Q
This commit is contained in:
parent
c822fd46e5
commit
c94ba84892
2 changed files with 184 additions and 38 deletions
examples/stm32g4/src/bin
|
@ -4,7 +4,7 @@
|
|||
|
||||
use defmt::*;
|
||||
use embassy_executor::Spawner;
|
||||
use embassy_stm32::rcc::{ClockSrc, PllM, PllN, PllR, PllSrc};
|
||||
use embassy_stm32::rcc::{ClockSrc, Pll, PllM, PllN, PllR, PllSrc};
|
||||
use embassy_stm32::Config;
|
||||
use embassy_time::{Duration, Timer};
|
||||
use {defmt_rtt as _, panic_probe as _};
|
||||
|
@ -13,8 +13,17 @@ use {defmt_rtt as _, panic_probe as _};
|
|||
async fn main(_spawner: Spawner) {
|
||||
let mut config = Config::default();
|
||||
|
||||
// Configure PLL to max frequency of 170 MHz
|
||||
config.rcc.mux = ClockSrc::PLLCLK(PllSrc::HSI16, PllM::Div4, PllN::Mul85, PllR::Div2);
|
||||
config.rcc.pll = Some(Pll {
|
||||
source: PllSrc::HSI16,
|
||||
prediv_m: PllM::Div4,
|
||||
mul_n: PllN::Mul85,
|
||||
div_p: None,
|
||||
div_q: None,
|
||||
// Main system clock at 170 MHz
|
||||
div_r: Some(PllR::Div2),
|
||||
});
|
||||
|
||||
config.rcc.mux = ClockSrc::PLL;
|
||||
|
||||
let _p = embassy_stm32::init(config);
|
||||
info!("Hello World!");
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue