Use a regex to match find enable and rst regs
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4e47b15daf
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1 changed files with 6 additions and 15 deletions
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@ -118,7 +118,7 @@ impl BlockInfo {
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fn find_reg_for_field<'c>(
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rcc: &'c ir::IR,
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reg_prefix: &str,
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reg_regex: &str,
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field_name: &str,
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) -> Option<(&'c str, &'c str)> {
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rcc.fieldsets.iter().find_map(|(name, fieldset)| {
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@ -126,7 +126,7 @@ fn find_reg_for_field<'c>(
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// not help matching for clock name.
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if name.starts_with("C1") || name.starts_with("C2") {
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None
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} else if name.starts_with(reg_prefix) {
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} else if Regex::new(reg_regex).unwrap().is_match(name) {
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fieldset
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.fields
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.iter()
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@ -441,31 +441,22 @@ pub fn gen(options: Options) {
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};
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if let Some(clock_prefix) = clock_prefix {
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// Ignore the numbers in clock name when searching for enable bits because clock
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// names do not map cleanly to regsiter names.
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// Example:
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// stm32f0: RCC_APB2ENR - APB peripheral clock enable register 2 CLOCK: APB1
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// stm32f4: RCC_APB2ENR - RCC APB2 peripheral clock enable register CLOCK: APB2
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//
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// Search for the enable bit in all available registers to support the stm32f0 case.
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let search_clock_prefix = clock_prefix.trim_end_matches(char::is_numeric);
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// Workaround for clock registers being split on some chip families. Assume fields are
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// named after peripheral and look for first field matching and use that register.
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let mut en =
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find_reg_for_field(&rcc, search_clock_prefix, &format!("{}EN", name));
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find_reg_for_field(&rcc, "^.+ENR\\d*$", &format!("{}EN", name));
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let mut rst =
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find_reg_for_field(&rcc, search_clock_prefix, &format!("{}RST", name));
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find_reg_for_field(&rcc, "^.+RSTR\\d*$", &format!("{}RST", name));
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if en.is_none() && name.ends_with("1") {
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en = find_reg_for_field(
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&rcc,
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search_clock_prefix,
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"^.+ENR\\d*$",
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&format!("{}EN", &name[..name.len() - 1]),
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);
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rst = find_reg_for_field(
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&rcc,
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search_clock_prefix,
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"^.+RSTR\\d*$",
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&format!("{}RST", &name[..name.len() - 1]),
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);
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}
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