Fix STM32 timer interrupt bug
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1a31cda3c3
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d052631118
1 changed files with 6 additions and 2 deletions
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@ -172,8 +172,11 @@ impl RtcDriver {
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// Mid-way point
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r.ccr(0).write(|w| w.set_ccr(0x8000));
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// Enable CC0, disable others
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r.dier().write(|w| w.set_ccie(0, true));
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// Enable overflow and half-overflow interrupts
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r.dier().write(|w| {
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w.set_uie(true);
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w.set_ccie(0, true);
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});
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let irq: <T as BasicInstance>::Interrupt = core::mem::transmute(());
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irq.unpend();
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@ -197,6 +200,7 @@ impl RtcDriver {
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// miss interrupts.
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r.sr().write_value(regs::SrGp(!sr.0));
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// Overflow
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if sr.uif() {
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self.next_period();
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}
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