Mutex
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2 changed files with 60 additions and 45 deletions
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@ -1,67 +1,82 @@
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//! Blocking shared I2C bus
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//! Blocking shared I2C bus
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use core::cell::RefCell;
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use core::cell::RefCell;
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use core::fmt::Debug;
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use core::future::Future;
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use embedded_hal_1::i2c;
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use embassy::blocking_mutex::raw::RawMutex;
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use embassy::blocking_mutex::Mutex;
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use embedded_hal_1::i2c::blocking::{I2c, Operation};
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use embedded_hal_1::i2c::ErrorType;
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#[derive(Copy, Clone, Eq, PartialEq, Debug)]
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use crate::shared_bus::i2c::I2cBusDeviceError;
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pub enum I2cBusDeviceError<BUS> {
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I2c(BUS),
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pub struct I2cBusDevice<'a, M: RawMutex, BUS> {
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bus: &'a Mutex<M, RefCell<BUS>>,
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}
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}
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impl<BUS> i2c::Error for I2cBusDeviceError<BUS>
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impl<'a, M: RawMutex, BUS> I2cBusDevice<'a, M, BUS> {
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where
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pub fn new(bus: &'a Mutex<M, RefCell<BUS>>) -> Self {
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BUS: i2c::Error + Debug,
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{
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fn kind(&self) -> i2c::ErrorKind {
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match self {
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Self::I2c(e) => e.kind(),
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}
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}
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}
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pub struct I2cBusDevice<'a, BUS> {
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bus: &'a RefCell<BUS>,
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}
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impl<'a, BUS> I2cBusDevice<'a, BUS> {
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pub fn new(bus: &'a RefCell<BUS>) -> Self {
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Self { bus }
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Self { bus }
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}
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}
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}
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}
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impl<'a, BUS> i2c::ErrorType for I2cBusDevice<'a, BUS>
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impl<'a, M: RawMutex, BUS> ErrorType for I2cBusDevice<'a, M, BUS>
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where
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where
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BUS: i2c::ErrorType,
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BUS: ErrorType,
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{
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{
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type Error = I2cBusDeviceError<BUS::Error>;
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type Error = I2cBusDeviceError<BUS::Error>;
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}
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}
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impl<M, BUS> i2c::I2c for I2cBusDevice<'_, BUS>
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impl<M, BUS> I2c for I2cBusDevice<'_, M, BUS>
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where
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where
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BUS: i2c::I2c,
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M: RawMutex,
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BUS: I2c,
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{
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{
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fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
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fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
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let mut bus = self.bus.borrow_mut();
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self.bus
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bus.read(address, buffer).map_err(I2cBusDeviceError::I2c)?;
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.lock(|bus| bus.borrow_mut().read(address, buffer).map_err(I2cBusDeviceError::I2c))
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Ok(())
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}
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}
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fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
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fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
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let mut bus = self.bus.borrow_mut();
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self.bus
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bus.write(address, bytes).map_err(I2cBusDeviceError::I2c)?;
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.lock(|bus| bus.borrow_mut().write(address, bytes).map_err(I2cBusDeviceError::I2c))
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Ok(())
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}
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}
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fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
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fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
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let mut bus = self.bus.borrow_mut();
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self.bus.lock(|bus| {
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bus.write_read(address, wr_buffer, rd_buffer)
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bus.borrow_mut()
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.map_err(I2cBusDeviceError::I2c)?;
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.write_read(address, wr_buffer, rd_buffer)
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Ok(())
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.map_err(I2cBusDeviceError::I2c)
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})
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}
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}
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fn transaction<'a>(&mut self, address: u8, operations: &mut [i2c::Operation<'a>]) -> Result<(), Self::Error> {
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fn transaction<'a>(&mut self, address: u8, operations: &mut [Operation<'a>]) -> Result<(), Self::Error> {
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let _ = address;
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let _ = operations;
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todo!()
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}
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fn write_iter<B: IntoIterator<Item = u8>>(&mut self, addr: u8, bytes: B) -> Result<(), Self::Error> {
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let _ = addr;
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let _ = bytes;
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todo!()
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}
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fn write_iter_read<B: IntoIterator<Item = u8>>(
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&mut self,
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addr: u8,
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bytes: B,
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buffer: &mut [u8],
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) -> Result<(), Self::Error> {
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let _ = addr;
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let _ = bytes;
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let _ = buffer;
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todo!()
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}
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fn transaction_iter<'a, O: IntoIterator<Item = Operation<'a>>>(
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&mut self,
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address: u8,
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operations: O,
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) -> Result<(), Self::Error> {
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let _ = address;
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let _ = address;
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let _ = operations;
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let _ = operations;
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todo!()
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todo!()
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@ -4,7 +4,7 @@ use core::fmt::Debug;
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use embedded_hal_1::digital::blocking::OutputPin;
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use embedded_hal_1::digital::blocking::OutputPin;
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use embedded_hal_1::spi;
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use embedded_hal_1::spi;
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use embedded_hal_1::spi::blocking::SpiDevice;
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use embedded_hal_1::spi::blocking::{SpiBusFlush, SpiDevice};
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#[derive(Copy, Clone, Eq, PartialEq, Debug)]
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#[derive(Copy, Clone, Eq, PartialEq, Debug)]
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pub enum SpiBusDeviceError<BUS, CS> {
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pub enum SpiBusDeviceError<BUS, CS> {
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type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
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type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
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}
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}
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impl<BUS, CS> spi::SpiDevice for SpiBusDevice<'_, BUS, CS>
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impl<BUS, CS> SpiDevice for SpiBusDevice<'_, BUS, CS>
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where
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where
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BUS: spi::SpiBusFlush,
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BUS: SpiBusFlush,
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CS: OutputPin,
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CS: OutputPin,
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{
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{
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type Bus = BUS;
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type Bus = BUS;
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fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
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fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
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let mut bus = self.bus.borrow_mut();
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let mut bus = self.bus.borrow_mut();
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self.cs.set_low().map_err(SpiDeviceWithCsError::Cs)?;
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self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
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let f_res = f(&mut bus);
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let f_res = f(&mut bus);
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let flush_res = bus.flush();
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let flush_res = bus.flush();
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let cs_res = self.cs.set_high();
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let cs_res = self.cs.set_high();
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let f_res = f_res.map_err(SpiDeviceWithCsError::Spi)?;
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let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
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flush_res.map_err(SpiDeviceWithCsError::Spi)?;
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flush_res.map_err(SpiBusDeviceError::Spi)?;
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cs_res.map_err(SpiDeviceWithCsError::Cs)?;
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cs_res.map_err(SpiBusDeviceError::Cs)?;
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Ok(f_res)
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Ok(f_res)
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}
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}
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