stm32: fix build for h7ab

embassy-stm32/src/adc/v3.rs

@@ -9,11 +9,11 @@ pub const VDDA_CALIB_MV: u32 = 3000;
 /// Sadly we cannot use `RccPeripheral::enable` since devices are quite inconsistent ADC clock
 /// configuration.
 unsafe fn enable() {
-    #[cfg(rcc_h7)]
+    #[cfg(stm32h7)]
     crate::pac::RCC.apb2enr().modify(|w| w.set_adcen(true));
-    #[cfg(rcc_g0)]
+    #[cfg(stm32g0)]
     crate::pac::RCC.apbenr2().modify(|w| w.set_adcen(true));
-    #[cfg(rcc_l4)]
+    #[cfg(stm32l4)]
     crate::pac::RCC.ahb2enr().modify(|w| w.set_adcen(true));
 }
 
@@ -54,9 +54,9 @@ pub struct Vref;
 impl<T: Instance> AdcPin<T> for Vref {}
 impl<T: Instance> super::sealed::AdcPin<T> for Vref {
     fn channel(&self) -> u8 {
-        #[cfg(not(rcc_g0))]
+        #[cfg(not(stm32g0))]
         let val = 0;
-        #[cfg(rcc_g0)]
+        #[cfg(stm32g0)]
         let val = 13;
         val
     }
@@ -66,9 +66,9 @@ pub struct Temperature;
 impl<T: Instance> AdcPin<T> for Temperature {}
 impl<T: Instance> super::sealed::AdcPin<T> for Temperature {
     fn channel(&self) -> u8 {
-        #[cfg(not(rcc_g0))]
+        #[cfg(not(stm32g0))]
         let val = 17;
-        #[cfg(rcc_g0)]
+        #[cfg(stm32g0)]
         let val = 12;
         val
     }
@@ -78,9 +78,9 @@ pub struct Vbat;
 impl<T: Instance> AdcPin<T> for Vbat {}
 impl<T: Instance> super::sealed::AdcPin<T> for Vbat {
     fn channel(&self) -> u8 {
-        #[cfg(not(rcc_g0))]
+        #[cfg(not(stm32g0))]
         let val = 18;
-        #[cfg(rcc_g0)]
+        #[cfg(stm32g0)]
         let val = 14;
         val
     }
@@ -281,7 +281,7 @@ impl<'d, T: Instance> Adc<'d, T> {
     /// Calculates the system VDDA by sampling the internal VREF channel and comparing
     /// the result with the value stored at the factory. If the chip's VDDA is not stable, run
     /// this before each ADC conversion.
-    #[cfg(not(rcc_g0))] // TODO is this supposed to be public?
+    #[cfg(not(stm32g0))] // TODO is this supposed to be public?
     #[allow(unused)] // TODO is this supposed to be public?
     fn calibrate(&mut self, vref: &mut Vref) {
         let vref_cal = unsafe { crate::pac::VREFINTCAL.data().read().value() };
@@ -363,11 +363,11 @@ impl<'d, T: Instance> Adc<'d, T> {
             }
 
             // Configure ADC
-            #[cfg(not(rcc_g0))]
+            #[cfg(not(stm32g0))]
             T::regs()
                 .cfgr()
                 .modify(|reg| reg.set_res(self.resolution.res()));
-            #[cfg(rcc_g0)]
+            #[cfg(stm32g0)]
             T::regs()
                 .cfgr1()
                 .modify(|reg| reg.set_res(self.resolution.res()));
@@ -376,9 +376,9 @@ impl<'d, T: Instance> Adc<'d, T> {
             Self::set_channel_sample_time(pin.channel(), self.sample_time);
 
             // Select channel
-            #[cfg(not(rcc_g0))]
+            #[cfg(not(stm32g0))]
             T::regs().sqr1().write(|reg| reg.set_sq(0, pin.channel()));
-            #[cfg(rcc_g0)]
+            #[cfg(stm32g0)]
             T::regs()
                 .chselr()
                 .write(|reg| reg.set_chsel(pin.channel() as u32));
@@ -400,14 +400,14 @@ impl<'d, T: Instance> Adc<'d, T> {
         }
     }
 
-    #[cfg(rcc_g0)]
+    #[cfg(stm32g0)]
     unsafe fn set_channel_sample_time(_ch: u8, sample_time: SampleTime) {
         T::regs()
             .smpr()
             .modify(|reg| reg.set_smp1(sample_time.sample_time()));
     }
 
-    #[cfg(not(rcc_g0))]
+    #[cfg(not(stm32g0))]
     unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
         if ch <= 9 {
             T::regs()

embassy-stm32/src/dac/v2.rs

@@ -115,9 +115,11 @@ impl<'d, T: Instance> Dac<'d, T> {
             // configuration.
             #[cfg(rcc_h7)]
             crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(true));
-            #[cfg(rcc_g0)]
+            #[cfg(rcc_h7ab)]
+            crate::pac::RCC.apb1lenr().modify(|w| w.set_dac1en(true));
+            #[cfg(stm32g0)]
             crate::pac::RCC.apbenr1().modify(|w| w.set_dac1en(true));
-            #[cfg(rcc_l4)]
+            #[cfg(stm32l4)]
             crate::pac::RCC.apb1enr1().modify(|w| w.set_dac1en(true));
 
             if channels >= 1 {

embassy-stm32/src/dma/bdma.rs

@@ -49,6 +49,12 @@ macro_rules! dma_num {
     (BDMA) => {
         0
     };
+    (BDMA1) => {
+        0
+    };
+    (BDMA2) => {
+        1
+    };
 }
 
 pub(crate) unsafe fn on_irq() {
@@ -80,6 +86,9 @@ pub(crate) unsafe fn init() {
 }
 
 pac::dma_channels! {
+    ($channel_peri:ident, BDMA1, bdma, $channel_num:expr, $dmamux:tt) => {
+        // BDMA1 in H7 doesn't use DMAMUX, which breaks
+    };
     ($channel_peri:ident, $dma_peri:ident, bdma, $channel_num:expr, $dmamux:tt) => {
         impl crate::dma::sealed::Channel for crate::peripherals::$channel_peri {
 

embassy-stm32/src/dma/dmamux.rs

@@ -28,7 +28,7 @@ pub(crate) mod sealed {
 }
 
 pub struct DMAMUX1;
-#[cfg(rcc_h7)]
+#[cfg(stm32h7)]
 pub struct DMAMUX2;
 
 pub trait MuxChannel: sealed::MuxChannel + super::Channel {

embassy-stm32/src/exti.rs

@@ -388,6 +388,6 @@ pub(crate) unsafe fn init() {
 
     #[cfg(not(any(rcc_wb, rcc_wl5, rcc_f1)))]
     <crate::peripherals::SYSCFG as crate::rcc::sealed::RccPeripheral>::enable();
-    #[cfg(rcc_f1)]
+    #[cfg(stm32f1)]
     <crate::peripherals::AFIO as crate::rcc::sealed::RccPeripheral>::enable();
 }

embassy-stm32/src/rcc/mod.rs

@@ -33,18 +33,20 @@ pub struct Clocks {
     pub apb2_tim: Hertz,
     #[cfg(any(rcc_wl5, rcc_u5))]
     pub apb3: Hertz,
-    #[cfg(any(rcc_h7))]
+    #[cfg(any(rcc_h7, rcc_h7ab))]
     pub apb4: Hertz,
 
     // AHB
     pub ahb1: Hertz,
     #[cfg(any(
-        rcc_l4, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_g4, rcc_u5, rcc_wb, rcc_wl5
+        rcc_l4, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_g4, rcc_u5, rcc_wb, rcc_wl5
     ))]
     pub ahb2: Hertz,
-    #[cfg(any(rcc_l4, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))]
+    #[cfg(any(
+        rcc_l4, rcc_f4, rcc_f410, rcc_f7, rcc_h7, rcc_h7ab, rcc_u5, rcc_wb, rcc_wl5
+    ))]
     pub ahb3: Hertz,
-    #[cfg(any(rcc_h7))]
+    #[cfg(any(rcc_h7, rcc_h7ab))]
     pub ahb4: Hertz,
 
     #[cfg(any(rcc_f4, rcc_f410, rcc_f7))]

stm32-data

@@ -1 +1 @@
-Subproject commit 608581a8960b95c4d472f59d0b028b47053d5873
+Subproject commit cb78ac90ba8607d6bb38296607c02e28c60391f8