Reset sdmmc clock on card init
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5e94b8060b
commit
ef2b83cc03
1 changed files with 21 additions and 13 deletions
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@ -18,6 +18,9 @@ use crate::rcc::RccPeripheral;
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use crate::time::Hertz;
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use crate::{peripherals, Peripheral};
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/// Frequency used for SD Card initialization. Must be no higher than 400 kHz.
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const SD_INIT_FREQ: Hertz = Hertz(400_000);
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/// The signalling scheme used on the SDMMC bus
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#[non_exhaustive]
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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@ -295,7 +298,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
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T::reset();
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let inner = T::inner();
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let clock = unsafe { inner.new_inner(T::frequency()) };
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unsafe { inner.new_inner() };
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irq.set_handler(Self::on_interrupt);
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irq.unpend();
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@ -314,7 +317,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
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d3,
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config,
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clock,
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clock: SD_INIT_FREQ,
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signalling: Default::default(),
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card: None,
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}
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@ -415,7 +418,7 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
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T::reset();
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let inner = T::inner();
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let clock = unsafe { inner.new_inner(T::frequency()) };
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unsafe { inner.new_inner() };
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irq.set_handler(Self::on_interrupt);
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irq.unpend();
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@ -434,7 +437,7 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
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d3,
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config,
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clock,
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clock: SD_INIT_FREQ,
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signalling: Default::default(),
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card: None,
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}
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@ -561,16 +564,10 @@ impl SdmmcInner {
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/// # Safety
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///
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/// Access to `regs` registers should be exclusive
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unsafe fn new_inner(&self, kernel_clk: Hertz) -> Hertz {
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unsafe fn new_inner(&self) {
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let regs = self.0;
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// While the SD/SDIO card or eMMC is in identification mode,
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// the SDMMC_CK frequency must be less than 400 kHz.
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let (clkdiv, clock) = unwrap!(clk_div(kernel_clk, 400_000));
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regs.clkcr().write(|w| {
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w.set_widbus(0);
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w.set_clkdiv(clkdiv);
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w.set_pwrsav(false);
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w.set_negedge(false);
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w.set_hwfc_en(true);
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@ -582,8 +579,6 @@ impl SdmmcInner {
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// Power off, writen 00: Clock to the card is stopped;
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// D[7:0], CMD, and CK are driven high.
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regs.power().modify(|w| w.set_pwrctrl(PowerCtrl::Off as u8));
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clock
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}
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/// Initializes card (if present) and sets the bus at the
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@ -605,6 +600,19 @@ impl SdmmcInner {
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// NOTE(unsafe) We have exclusive access to the peripheral
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unsafe {
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// While the SD/SDIO card or eMMC is in identification mode,
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// the SDMMC_CK frequency must be less than 400 kHz.
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let (clkdiv, init_clock) = unwrap!(clk_div(ker_ck, SD_INIT_FREQ.0));
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*clock = init_clock;
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// CPSMACT and DPSMACT must be 0 to set WIDBUS
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self.wait_idle();
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regs.clkcr().modify(|w| {
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w.set_widbus(0);
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w.set_clkdiv(clkdiv);
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});
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regs.power().modify(|w| w.set_pwrctrl(PowerCtrl::On as u8));
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self.cmd(Cmd::idle(), false)?;
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