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Merge pull request #1768 from smartelfi/main

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fix rng ced toggling sequence on reset.
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Dario Nieuwenhuis 2023-08-10 15:09:31 +00:00 committed by GitHub
commit fb49e03eda
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1 changed files with 8 additions and 3 deletions
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11
embassy-stm32/src/rng.rs
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@ -73,15 +73,20 @@ impl<'d, T: Instance> Rng<'d, T> {
#[cfg(not(rng_v1))] #[cfg(not(rng_v1))]
pub fn reset(&mut self) { pub fn reset(&mut self) {
T::regs().cr().write(|reg| { T::regs().cr().write(|reg| {
reg.set_rngen(false);
reg.set_condrst(true); reg.set_condrst(true);
reg.set_nistc(pac::rng::vals::Nistc::CUSTOM);
// set RNG config "A" according to reference manual // set RNG config "A" according to reference manual
// this has to be written within the same write access as setting the CONDRST bit // this has to be written within the same write access as setting the CONDRST bit
reg.set_nistc(pac::rng::vals::Nistc::DEFAULT);
reg.set_rng_config1(pac::rng::vals::RngConfig1::CONFIGA); reg.set_rng_config1(pac::rng::vals::RngConfig1::CONFIGA);
reg.set_clkdiv(pac::rng::vals::Clkdiv::NODIV);
reg.set_rng_config2(pac::rng::vals::RngConfig2::CONFIGA_B); reg.set_rng_config2(pac::rng::vals::RngConfig2::CONFIGA_B);
reg.set_rng_config3(pac::rng::vals::RngConfig3::CONFIGA); reg.set_rng_config3(pac::rng::vals::RngConfig3::CONFIGA);
reg.set_clkdiv(pac::rng::vals::Clkdiv::NODIV); reg.set_ced(true);
reg.set_ie(false);
reg.set_rngen(true);
});
T::regs().cr().write(|reg| {
reg.set_ced(false);
}); });
// wait for CONDRST to be set // wait for CONDRST to be set
while !T::regs().cr().read().condrst() {} while !T::regs().cr().read().condrst() {}