[UCPD] Implement hard reset transmission
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1 changed files with 51 additions and 0 deletions
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@ -403,6 +403,50 @@ impl<'d, T: Instance> PdPhy<'d, T> {
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w.set_txmsgsentie(enable);
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});
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}
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/// Transmit a hard reset.
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pub async fn transmit_hardreset(&mut self) -> Result<(), TxError> {
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let r = T::REGS;
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// Clear the hardreset interrupt flags.
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T::REGS.icr().write(|w| {
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w.set_txmsgdisccf(true);
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w.set_txmsgsentcf(true);
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});
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// Trigger hard reset transmission.
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r.cr().modify(|w| {
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w.set_txhrst(true);
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});
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let _on_drop = OnDrop::new(|| self.enable_hardreset_interrupts(false));
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poll_fn(|cx| {
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let r = T::REGS;
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let sr = r.sr().read();
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if sr.rxhrstdet() {
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// Clean and re-enable hard reset receive interrupt.
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r.icr().write(|w| w.set_rxhrstdetcf(true));
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r.imr().modify(|w| w.set_rxhrstdetie(true));
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Poll::Ready(Err(TxError::HardReset))
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} else if sr.hrstdisc() {
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Poll::Ready(Err(TxError::Discarded))
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} else if sr.hrstsent() {
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Poll::Ready(Ok(()))
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} else {
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T::waker().register(cx.waker());
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self.enable_hardreset_interrupts(true);
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Poll::Pending
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}
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})
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.await
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}
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fn enable_hardreset_interrupts(&self, enable: bool) {
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T::REGS.imr().modify(|w| {
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w.set_hrstdiscie(enable);
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w.set_hrstsentie(enable);
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});
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}
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}
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/// Interrupt handler.
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@ -437,6 +481,13 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
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});
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}
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if sr.hrstdisc() || sr.hrstsent() {
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r.imr().modify(|w| {
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w.set_hrstdiscie(false);
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w.set_hrstsentie(false);
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});
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}
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// Wake the task to clear and re-enabled interrupts.
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T::waker().wake();
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}
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