Commit graph

5230 commits

Author SHA1 Message Date
Dario Nieuwenhuis
42c13c8c3d nrf: add new interrupt binding traits and macro. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
a054891263 cortex-m: rename Handler to DynHandler.
I want to use the name Handler for the new interrupt binding macro.
2023-03-06 00:17:51 +01:00
bors[bot]
403a83e08d
Merge #1260
1260: time/ticker: make sure the future for .next() is Unpin. r=Dirbaio a=Dirbaio

It was Unpin before #1248 

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-05 22:15:14 +00:00
Dario Nieuwenhuis
c88bbaa5ec time/ticker: make sure the future for .next() is Unpin. 2023-03-05 23:13:22 +01:00
Dario Nieuwenhuis
6dfda69cc4
readme: add embassy-rp 2023-03-05 20:19:18 +01:00
Dario Nieuwenhuis
bf013be9ba
Merge pull request #1232 from embassy-rs/nrf-qspi-fixes
nrf/qspi: nrf53 support, u32 addrs, remove const generic, add raw read/write.
2023-03-05 03:19:11 +01:00
Dario Nieuwenhuis
d91efe3e62
Merge pull request #1208 from embassy-rs/nrf-uarte-lockfree
nrf/buffered_uarte: make it work without rts/cts, and lock-free.
2023-03-05 02:56:15 +01:00
Dario Nieuwenhuis
f7dfc49c5c nrf/qspi: add _raw variants of methods that don't do bounds checks.
Useful for the nRF7002, which presents as a "fake" QSPI flash, and
the "capacity" concept doesn't really apply to it.
2023-03-05 02:55:00 +01:00
Dario Nieuwenhuis
8eb8ea6174 nrf/qspi: remove FLASH_SIZE const generic param. 2023-03-05 02:33:02 +01:00
Dario Nieuwenhuis
75f69803af nrf/qspi: always use u32 for addresses. 2023-03-05 02:30:53 +01:00
Dario Nieuwenhuis
1955a225e8 nrf/qspi: add nrf53 support. 2023-03-05 02:17:59 +01:00
Dario Nieuwenhuis
9eb65b11cb nrf/qspi: remove cfg_if hack 2023-03-05 02:08:29 +01:00
Dario Nieuwenhuis
7650fea5f2 nrf/buffered_uarte: add HIL tests. 2023-03-04 15:12:49 +01:00
Dario Nieuwenhuis
916f94b366 nrf/buffered_uarte: make available on stable. 2023-03-04 15:12:49 +01:00
Dario Nieuwenhuis
ccc224c81f nrf/buffered_uarte: remove PeripheralMutex, make it work without rts/cts.
> dirbaio: so I was checking how zephyr does UARTE RX on nRF
> dirbaio: because currently we have the ugly "restart DMA on line idle to flush it" hack
> dirbaio: because according to the docs "For each byte received over the RXD line, an RXDRDY event will be generated. This event is likely to occur before the corresponding data has been transferred to Data RAM."
> dirbaio: so as I understood it, the only way to guarantee the data is actually transferred to RAM is to stop+restart DMA
> dirbaio: well, guess what?
> dirbaio: they just count RXDRDY's, and process that amount of data without restarting DMA
> dirbaio: with a timer configured as counter https://github.com/zephyrproject-rtos/zephyr/blob/main/drivers/serial/uart_nrfx_uarte.c#L650-L692
> dirbaio: 🤔🤷⁉️
> dirbaio: someone saying you can do the "hook up rxdrdy to a counter" trick, someone else saying it's wrong 🤪 https://devzone.nordicsemi.com/f/nordic-q-a/28420/uarte-in-circular-mode

So we're going to do just that!

- BufferedUarte is lock-free now. No PeripheralMutex.
- The "restart DMA on line idle to flush it" hack is GONE. This means
  - It'll work correctly without RTS/CTS now.
  - It'll have better throughput when using RTS/CTS.
2023-03-04 15:12:49 +01:00
Dario Nieuwenhuis
bef559307c
Merge pull request #1259 from dalegaard/master
embassy_usb: Add split() for cdc_acm
2023-03-04 15:08:02 +01:00
Lasse Dalegaard
7b9075130e embassy_usb: Add split() for cdc_acm 2023-03-04 10:36:10 +01:00
Dario Nieuwenhuis
51478caad8 nrf/timer: add support for counter mode. 2023-03-04 05:37:33 +01:00
Dario Nieuwenhuis
4314b823aa nrf: add PPI channel group driver. 2023-03-04 05:37:33 +01:00
Dario Nieuwenhuis
78d733fc73
Merge pull request #1258 from CBJamo/rp-gpio-loglevel
Swap debug! for trace! in rp gpio
2023-03-02 22:18:01 +01:00
Caleb Jamison
7bdb3abad7 Swap debug! for trace! in rp gpio
When using gpio pin changes for things like peripheral interrupts these
debug! calls flood defmt, making it difficult to find what you're
actually looking for.
2023-03-02 13:59:52 -05:00
Dario Nieuwenhuis
14ed0b90b8
Merge pull request #1257 from MabezDev/docs/add-esp-hal
docs: add esp-hal
2023-03-02 17:57:39 +01:00
Scott Mabin
64003cdfd6 Add embassy-esp README 2023-03-02 16:56:58 +00:00
Dario Nieuwenhuis
8bd8fbd131
Merge pull request #1256 from pattop/hal_common_atomic_ring_buffer_push_slices
hal-common/atomic_ring_buffer: add push_bufs() push_slices()
2023-03-02 17:26:43 +01:00
Patrick Oppenlander
78974dfeb4 hal-common/atomic_ring_buffer: add push_bufs() push_slices()
This allows a writer to access all of the free space in the buffer, even
when it's wrapping around.
2023-03-02 14:11:49 +11:00
bors[bot]
4ac257adb9
Merge #1255
1255: common: allow atomic ringbuf to fill up to N instead of just N-1. r=Dirbaio a=Dirbaio

Extracted out of #1208. Since I don't think that'll end up using the ringbuf in the end, I've separated it.

This allows the ringbuf to be filled up to `N` instead of just `N-1`, using some fun tricks on the indices. 

The advantage is better performance: Before, the first write would fill N-1 bytes, The second would write just the 1 byte left before wrapping, then N-2. Then 2, then N-3, and so on. This would result in more smaller chunks, so worse perf. This problem is gone now.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-02 00:01:49 +00:00
Dario Nieuwenhuis
f95aafc90e common: allow atomic ringbuf to fill up to N instead of just N-1.
This allows the ringbuf to be filled up to `N` instead of just `N-1`, using some fun tricks on the indices.

The advantage is better performance: Before, the first write would fill N-1 bytes, The second would write just the 1 byte left before wrapping, then N-2. Then 2, then N-3, and so on. This would result in more smaller chunks, so worse perf. This problem is gone now.
2023-03-02 01:01:19 +01:00
Dario Nieuwenhuis
c4f4aa10f9
Merge pull request #1244 from embassy-rs/interruptexecutor
cortex-m/executor: don't use the owned interrupts system.
2023-03-01 22:38:27 +01:00
Dario Nieuwenhuis
206b4b597e
Merge pull request #1254 from davidedellagiustina/fix
FIx `PacketQueue::init()`
2023-03-01 22:23:03 +01:00
Davide Della Giustina
c0e40b887b
Apply fix 2023-03-01 20:57:13 +00:00
Dario Nieuwenhuis
351e4407ef
Merge pull request #1252 from pattop/stm32_spi_fifo_fix
stm32/spi: fix occasional data corruption
2023-03-01 03:08:05 +01:00
Patrick Oppenlander
aabc275186 stm32/spi: fix occasional data corruption
Need to clear the rx fifo before enabling rx dma.
2023-03-01 12:24:22 +11:00
Dario Nieuwenhuis
66ca57312f
Merge pull request #1251 from embassy-rs/fix-examples
Example fixes.
2023-03-01 01:59:41 +01:00
Dario Nieuwenhuis
6dbb631f1e Example fixes. 2023-03-01 01:32:42 +01:00
Dario Nieuwenhuis
4dfa32b1e0 cortex-m/executor: don't use the owned interrupts system.
Preparation for #1224.
2023-02-28 23:07:20 +01:00
bors[bot]
711ce10145
Merge #1245
1245: fix: rp - disable Pull-down/up resistors for ADC read r=Dirbaio a=elpiel



Co-authored-by: Lachezar Lechev <elpiel93@gmail.com>
2023-02-28 19:31:58 +00:00
bors[bot]
b16b3b0dbb
Merge #1247
1247: `PacketQueue::init()` r=davidedellagiustina a=davidedellagiustina

`PacketQueue` is pretty big, so I added a method to initialize it without requiring an allocation on the stack (which could in fact overflow). Before this PR, the only solution would be to declare a `PacketQueue` instance as a `static mut`, while now one could for example have a `Box<MaybeUninit<PacketQueue<...>>>` and then use `init()` on it.

Ideally, the same work would need to be done for all those structures that own big arrays which could overflow the stack.

Co-authored-by: Davide Della Giustina <davide@dellagiustina.com>
2023-02-28 18:26:37 +00:00
Davide Della Giustina
3c601bf8d2
PacketQueue::init() does not need to be unsafe 2023-02-28 18:04:43 +00:00
Davide Della Giustina
485bb76e46
Implemented suggestions from @Dirbaio 2023-02-28 17:39:02 +00:00
bors[bot]
d719f8bc03
Merge #1248
1248: embassy-time: add async tick() method to Ticker r=Dirbaio a=kbleeke

Small QOL change so you don't have to add a direct dependency on futures-util to use the Ticker

Co-authored-by: kbleeke <pluth@0t.re>
2023-02-28 17:12:13 +00:00
kbleeke
4e212c7a0b embassy-time: add async tick() method to Ticker 2023-02-28 17:25:42 +01:00
Davide Della Giustina
c1e93c0904
PacketQueue::new() uses ::init() when in nightly 2023-02-28 14:34:26 +00:00
Davide Della Giustina
90f2939bf6
Added PacketQueue::init() 2023-02-28 14:22:54 +00:00
Lachezar Lechev
5cb0c8cc01
fix: rp - disable Pull-down/up resistors for ADC read
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-02-28 09:22:38 +02:00
bors[bot]
28b695e7c9
Merge #1243
1243: RP-PICO UART adding set_baudrate r=Dirbaio a=andres-hurtado-lopez

The following PR attepts to bring fuctionality to allow change od UART baudrate changes during runtime.

Changes where created under `@Dirbaio` supervision and discussed on issue:

[https://github.com/embassy-rs/embassy/issues/1241#issuecomment-1445500175]( https://github.com/embassy-rs/embassy/issues/1241#issuecomment-1445500175)

Co-authored-by: Andres Hurtado Lopez <andresh@cultivate-agri.com>
2023-02-27 02:26:20 +00:00
Andres Hurtado Lopez
2331d58aa6 RP-PICO UART adding set_baudrate: missing to run rust-fmt 2023-02-26 21:23:51 -05:00
Andres Hurtado Lopez
482ba835c4 RP-PICO UART adding set_baudrate: Changing static call from specific type to a Self (requires adding lifetime specifier) 2023-02-26 19:20:08 -05:00
Andres Hurtado Lopez
7172dfd083 RP-PICO UART adding set_baudrate: refactoring of methods 2023-02-26 19:14:25 -05:00
Andres Hurtado Lopez
8fb380b180 RP-PICO UART adding set_baudrate 2023-02-26 18:40:23 -05:00
Dario Nieuwenhuis
bc71230cd0 examples/std: fix net running out of sockets. 2023-02-26 21:50:12 +01:00