Bob McWhirter
b88fc2847a
Checkpoint with lifetime issues.
2021-06-29 11:01:57 -04:00
Thales Fragoso
210104e6dc
Remove unused gpio_af from codegen
2021-06-24 19:23:51 -03:00
Ulf Lilleengen
b6a8703698
Add support for generating PAC for dual cores
...
* Chips that have multiple cores will be exposed as chipname_corename,
i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
and pick the first and only core from the list
* Add support for stm32wl55 chip family
2021-06-16 15:12:07 +02:00
Dominik Boehi
9edb6e41ce
Make gen.py work without CSafeLoader
2021-06-12 18:28:21 +02:00
Bob McWhirter
b4dca64e20
Move most of DMA out of gen.py.
2021-06-03 14:53:48 -04:00
Bob McWhirter
2c722ec0ee
Migrate sdmmc to macro tables.
2021-06-03 13:50:48 -04:00
Bob McWhirter
fe47f781be
Migrate exti_irq stuff to macro tables.
2021-06-03 13:35:27 -04:00
Bob McWhirter
75dc0fd542
Migrate TIM[2-5] to macro tables.
2021-06-03 13:23:21 -04:00
Bob McWhirter
00892c7362
Migrate USART to macro tables.
2021-06-03 13:12:38 -04:00
Bob McWhirter
6958091b50
Move DAC, I2C, SPI and RNG to macro-tables.
2021-06-03 13:12:38 -04:00
Bob McWhirter
0c54c1afd1
DAC v2 basics.
2021-06-01 12:08:30 -04:00
Dario Nieuwenhuis
553432a8e8
stm32: remove unused stuff from gen.py
2021-05-31 03:58:03 +02:00
Dario Nieuwenhuis
d8e4421fc6
Add stm32-metapac crate, with codegen in rust
2021-05-31 02:40:58 +02:00
Ulf Lilleengen
d4dbeb6933
Handle case where pin value could be 0
...
In the case where GPIO mapping could look like this:
PA5:
SPI1_SCK: 0
The pin would not get any generated impl because the if expression would evaluate to false. Fix this for all cases in gen.py by comparing against None
~
2021-05-27 13:25:06 +02:00
Bob McWhirter
aed8283cd5
Finalize i2c v2.
2021-05-25 10:02:40 -04:00
Thales Fragoso
13698d58e4
Add timer/rtc impl macro
2021-05-23 15:59:09 -03:00
Thales Fragoso
2b1d7fe3ee
Use Mutex and CriticalSection from bare-metal 1.0
2021-05-22 23:53:50 -03:00
Thales Fragoso
706992aef9
Support block names with underscores
2021-05-22 22:25:44 -03:00
Thales Fragoso
a0fe9e4645
Add unstable feature to give access to the pac
2021-05-22 15:34:49 -03:00
Dario Nieuwenhuis
35f1f65670
Generate mod regs just once, so rustfmt is way faster.
2021-05-21 19:34:41 +02:00
Dario Nieuwenhuis
f96db3d9d2
Remove ad-hoc imports from generated code.
2021-05-21 19:29:37 +02:00
Ulf Lilleengen
03bfbe51f5
Create DMA fn to select peripheral based on channel number
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
32fbb32a84
Move exti setup into pac module
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
a95c78b8bd
Merge exti macros into one and use simpler recursion
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
b5373a1a64
Allow generating pac for STM32L0
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
9fa5a2920f
Move regs trait implementation into generated pac
...
This allows handling devices that don't have DMA2
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
0cd3236fa3
Generate exti interrupt handlers
...
Match interrupts starting with ^EXTI and generate init code and irq
handler for them
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
8172db6d8e
Match on RNG interrupt names to support other RNG peripherals
2021-05-21 18:38:33 +02:00
Bob McWhirter
a4fd1282e9
Generate _spi_v3 items.
2021-05-17 11:34:36 -04:00
Dario Nieuwenhuis
bdc3ada4b2
WIP: dma
2021-05-17 01:08:30 +02:00
Thales Fragoso
359aaa5aeb
Implement embedded-sdmmc traits
2021-05-14 23:43:09 -03:00
Thales Fragoso
490152d028
Better interrupt handling
2021-05-14 23:42:09 -03:00
Thales Fragoso
0b607ca80a
Initial H7 sdmmc support
2021-05-14 23:40:28 -03:00
Bob McWhirter
2569d38ab4
Adjust pin-names to FooPin.
...
Move common bits up to spi/mod.rs.
Isolate the RNG interrupt in a sub-module to avoid conflict with the const.
2021-05-14 10:11:43 -04:00
Bob McWhirter
9e93a0999f
Add SPIv1, use cfg_attr to pick correct impl.
...
Add IRQ to impl_rng!() to accomodate RNG vs HASH_RNG split.
2021-05-13 14:28:53 -04:00
Bob McWhirter
36c16dbef8
Continuing to update clocks (unused now) and SPI
2021-05-12 10:46:18 -04:00
Bob McWhirter
7d52e1b350
Further work on SPI v2 blocking.
2021-05-11 11:25:01 -04:00
Bob McWhirter
0470abb353
Checkpoint.
2021-05-10 15:33:37 -04:00
Dario Nieuwenhuis
c4294d97ff
Fix DMA
2021-05-10 21:31:59 +02:00
Dario Nieuwenhuis
ac616a6dcf
Add dma scaffolding
2021-05-10 01:20:04 +02:00
Bob McWhirter
75fe03a7e6
Further clean-up and adjustments. Follow RM for FIPS.
2021-05-06 16:38:53 -04:00
Bob McWhirter
e8898b48f9
Clean up the impl_rng!() argument.
...
use poll_fn instead of impl'ing a Future directly.
Return errors when error conditions exist.
2021-05-06 14:58:41 -04:00
Bob McWhirter
e8537ca9c2
Implement async RNG, including rand_core sync traits.
2021-05-06 14:35:46 -04:00
Dario Nieuwenhuis
f5f98cdeab
Autogenerate features for family, peripherals and peripheral versions
2021-05-06 03:59:16 +02:00
Dario Nieuwenhuis
23ca2f9174
Autogenerate the tailored PAC for each chip
2021-05-06 03:43:46 +02:00
Bob McWhirter
d8156b43b1
Generate some chip features by peripherals.
2021-05-05 11:01:02 -04:00
Bob McWhirter
e248baecd4
Regenerate with SYSCFG and EXTI base addresses.
2021-05-05 10:18:09 -04:00
Dario Nieuwenhuis
7ef5806168
stm32: codegen interrupts
2021-05-01 03:08:52 +02:00
Bob McWhirter
0713947d67
Stub in RNG impl.
2021-04-26 14:11:46 -04:00
Dario Nieuwenhuis
936efd164d
USART codegen
2021-04-25 22:35:51 +02:00
