342 lines
11 KiB
Rust
342 lines
11 KiB
Rust
use regex::Regex;
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use serde::Deserialize;
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use std::collections::{HashMap, HashSet};
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use std::env;
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use std::fmt::Write as _;
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use std::fs;
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use std::fs::File;
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use std::io::Write;
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use std::path::Path;
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use std::path::PathBuf;
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use chiptool::{generate, ir, transform};
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#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
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pub struct Chip {
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pub name: String,
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pub family: String,
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pub line: String,
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pub core: String,
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pub flash: u32,
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pub ram: u32,
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pub gpio_af: String,
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pub packages: Vec<Package>,
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pub peripherals: HashMap<String, Peripheral>,
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pub interrupts: HashMap<String, u32>,
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}
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#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
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pub struct Package {
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pub name: String,
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pub package: String,
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}
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#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
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pub struct Peripheral {
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pub address: u32,
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#[serde(default)]
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pub kind: Option<String>,
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#[serde(default)]
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pub block: Option<String>,
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#[serde(default)]
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pub clock: Option<String>,
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#[serde(default)]
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pub pins: Vec<Pin>,
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}
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#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
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pub struct Pin {
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pub pin: String,
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pub signal: String,
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pub af: Option<String>,
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}
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struct BlockInfo {
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/// usart_v1/USART -> usart
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module: String,
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/// usart_v1/USART -> v1
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version: String,
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/// usart_v1/USART -> USART
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block: String,
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}
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impl BlockInfo {
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fn parse(s: &str) -> Self {
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let mut s = s.split("/");
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let module = s.next().unwrap();
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let block = s.next().unwrap();
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assert!(s.next().is_none());
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let mut s = module.split("_");
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let module = s.next().unwrap();
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let version = s.next().unwrap();
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assert!(s.next().is_none());
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Self {
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module: module.to_string(),
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version: version.to_string(),
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block: block.to_string(),
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}
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}
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}
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fn make_table(out: &mut String, name: &str, data: &Vec<Vec<String>>) {
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write!(
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out,
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"#[macro_export]
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macro_rules! {} {{
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($($pat:tt => $code:tt;)*) => {{
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macro_rules! __{}_inner {{
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$(($pat) => $code;)*
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($_:tt) => {{}}
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}}
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",
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name, name
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)
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.unwrap();
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for row in data {
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write!(out, " __{}_inner!(({}));\n", name, row.join(",")).unwrap();
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}
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write!(
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out,
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" }};
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}}"
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)
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.unwrap();
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}
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fn main() {
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let dir = "../stm32-data/data";
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println!("cwd: {:?}", env::current_dir());
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let chip_name = env::vars_os()
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.map(|(a, _)| a.to_string_lossy().to_string())
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.find(|x| x.starts_with("CARGO_FEATURE_STM32"))
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.expect("No stm32xx Cargo feature enabled")
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.strip_prefix("CARGO_FEATURE_")
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.unwrap()
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.to_ascii_uppercase();
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let chip_path = Path::new(&dir)
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.join("chips")
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.join(&format!("{}.yaml", chip_name));
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let chip = fs::read(chip_path).unwrap();
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let chip: Chip = serde_yaml::from_slice(&chip).unwrap();
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let mut ir = ir::IR::new();
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let mut dev = ir::Device {
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interrupts: Vec::new(),
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peripherals: Vec::new(),
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};
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let mut peripheral_versions: HashMap<String, String> = HashMap::new();
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let mut pin_table: Vec<Vec<String>> = Vec::new();
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let mut interrupt_table: Vec<Vec<String>> = Vec::new();
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let mut peripherals_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_pins_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_rcc_table: Vec<Vec<String>> = Vec::new();
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let dma_base = chip
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.peripherals
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.get(&"DMA".to_string())
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.unwrap_or_else(|| chip.peripherals.get(&"DMA1".to_string()).unwrap())
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.address;
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let dma_stride = 0x400;
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let gpio_base = chip.peripherals.get(&"GPIOA".to_string()).unwrap().address;
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let gpio_stride = 0x400;
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for (name, p) in &chip.peripherals {
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let mut ir_peri = ir::Peripheral {
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name: name.clone(),
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array: None,
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base_address: p.address,
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block: None,
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description: None,
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interrupts: HashMap::new(),
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};
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if let Some(block) = &p.block {
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let bi = BlockInfo::parse(block);
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for pin in &p.pins {
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let mut row = Vec::new();
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row.push(name.clone());
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row.push(bi.module.clone());
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row.push(bi.block.clone());
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row.push(pin.pin.clone());
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row.push(pin.signal.clone());
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if let Some(ref af) = pin.af {
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row.push(af.clone());
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}
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peripheral_pins_table.push(row);
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}
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let mut peripheral_row = Vec::new();
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peripheral_row.push(bi.module.clone());
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peripheral_row.push(name.clone());
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peripherals_table.push(peripheral_row);
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if let Some(old_version) =
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peripheral_versions.insert(bi.module.clone(), bi.version.clone())
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{
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if old_version != bi.version {
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panic!(
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"Peripheral {} has multiple versions: {} and {}",
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bi.module, old_version, bi.version
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);
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}
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}
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ir_peri.block = Some(format!("{}::{}", bi.module, bi.block));
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match bi.module.as_str() {
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"gpio" => {
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let port_letter = name.chars().skip(4).next().unwrap();
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let port_num = port_letter as u32 - 'A' as u32;
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assert_eq!(p.address, gpio_base + gpio_stride * port_num);
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for pin_num in 0..16 {
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let pin_name = format!("P{}{}", port_letter, pin_num);
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pin_table.push(vec![
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pin_name.clone(),
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name.clone(),
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port_num.to_string(),
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pin_num.to_string(),
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format!("EXTI{}", pin_num),
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]);
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}
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}
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"dma" => {
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let dma_num = if name == "DMA" {
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0
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} else {
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let dma_letter = name.chars().skip(3).next().unwrap();
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dma_letter as u32 - '1' as u32
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};
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assert_eq!(p.address, dma_base + dma_stride * dma_num);
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}
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"spi" => {
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if let Some(clock) = &p.clock {
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// Workaround for APB1 register being split on some chip families. Assume
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// first register until we can find a way to hint which register is used
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let reg = clock.to_ascii_lowercase();
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let (enable_reg, reset_reg) = if chip.family == "STM32H7" && clock == "APB1"
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{
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(format!("{}lenr", reg), format!("{}lrstr", reg))
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} else if chip.family == "STM32L4" && clock == "APB1" {
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(format!("{}enr1", reg), format!("{}rstr1", reg))
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} else {
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(format!("{}enr", reg), format!("{}rstr", reg))
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};
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let field = name.to_ascii_lowercase();
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peripheral_rcc_table.push(vec![
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name.clone(),
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enable_reg,
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reset_reg,
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format!("set_{}en", field),
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format!("set_{}rst", field),
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]);
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}
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}
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_ => {}
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}
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}
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dev.peripherals.push(ir_peri);
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}
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for (name, &num) in &chip.interrupts {
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dev.interrupts.push(ir::Interrupt {
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name: name.clone(),
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description: None,
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value: num,
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});
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interrupt_table.push(vec![name.to_ascii_uppercase()]);
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}
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ir.devices.insert("".to_string(), dev);
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let mut extra = format!(
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"pub fn GPIO(n: usize) -> gpio::Gpio {{
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gpio::Gpio(({} + {}*n) as _)
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}}
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pub fn DMA(n: usize) -> dma::Dma {{
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dma::Dma(({} + {}*n) as _)
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}}",
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gpio_base, gpio_stride, dma_base, dma_stride,
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);
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let peripheral_version_table = peripheral_versions
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.iter()
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.map(|(kind, version)| vec![kind.clone(), version.clone()])
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.collect();
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make_table(&mut extra, "pins", &pin_table);
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make_table(&mut extra, "interrupts", &interrupt_table);
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make_table(&mut extra, "peripherals", &peripherals_table);
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make_table(&mut extra, "peripheral_versions", &peripheral_version_table);
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make_table(&mut extra, "peripheral_pins", &peripheral_pins_table);
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make_table(&mut extra, "peripheral_rcc", &peripheral_rcc_table);
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for (module, version) in peripheral_versions {
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println!("loading {} {}", module, version);
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let regs_path = Path::new(&dir)
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.join("registers")
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.join(&format!("{}_{}.yaml", module, version));
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let mut peri: ir::IR = serde_yaml::from_reader(File::open(regs_path).unwrap()).unwrap();
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transform::expand_extends::ExpandExtends {}
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.run(&mut peri)
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.unwrap();
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let prefix = module;
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transform::map_names(&mut peri, |s, k| match k {
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transform::NameKind::Block => format!("{}::{}", prefix, s),
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transform::NameKind::Fieldset => format!("{}::regs::{}", prefix, s),
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transform::NameKind::Enum => format!("{}::vals::{}", prefix, s),
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_ => s.to_string(),
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})
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.unwrap();
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ir.merge(peri);
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}
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// Cleanups!
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transform::sort::Sort {}.run(&mut ir).unwrap();
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transform::Sanitize {}.run(&mut ir).unwrap();
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let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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let items = generate::render(&ir).unwrap();
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let mut file = File::create(out.join("pac.rs")).unwrap();
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let data = items.to_string().replace("] ", "]\n");
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// Remove inner attributes like #![no_std]
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let re = Regex::new("# *! *\\[.*\\]").unwrap();
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let data = re.replace_all(&data, "");
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file.write_all(data.as_bytes()).unwrap();
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file.write_all(extra.as_bytes()).unwrap();
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let mut device_x = String::new();
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for (name, _) in &chip.interrupts {
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write!(
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&mut device_x,
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"PROVIDE({} = DefaultHandler);\n",
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name.to_ascii_uppercase()
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)
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.unwrap();
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}
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File::create(out.join("device.x"))
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.unwrap()
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.write_all(device_x.as_bytes())
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.unwrap();
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println!("cargo:rustc-link-search={}", out.display());
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println!("cargo:rerun-if-changed=build.rs");
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}
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