694 lines
26 KiB
Rust
694 lines
26 KiB
Rust
//! Timers, PWM, quadrature decoder.
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pub mod complementary_pwm;
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pub mod qei;
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pub mod simple_pwm;
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use stm32_metapac::timer::vals;
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use crate::interrupt;
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use crate::rcc::RccPeripheral;
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use crate::time::Hertz;
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/// Low-level timer access.
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#[cfg(feature = "unstable-pac")]
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pub mod low_level {
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pub use super::sealed::*;
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}
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pub(crate) mod sealed {
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use super::*;
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/// Basic 16-bit timer instance.
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pub trait Basic16bitInstance: RccPeripheral {
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/// Interrupt for this timer.
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type Interrupt: interrupt::typelevel::Interrupt;
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/// Get access to the basic 16bit timer registers.
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///
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/// Note: This works even if the timer is more capable, because registers
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/// for the less capable timers are a subset. This allows writing a driver
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/// for a given set of capabilities, and having it transparently work with
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/// more capable timers.
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fn regs() -> crate::pac::timer::TimBasic;
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/// Start the timer.
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fn start(&mut self) {
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Self::regs().cr1().modify(|r| r.set_cen(true));
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}
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/// Stop the timer.
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fn stop(&mut self) {
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Self::regs().cr1().modify(|r| r.set_cen(false));
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}
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/// Reset the counter value to 0
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fn reset(&mut self) {
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Self::regs().cnt().write(|r| r.set_cnt(0));
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}
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/// Set the frequency of how many times per second the timer counts up to the max value or down to 0.
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///
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/// This means that in the default edge-aligned mode,
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/// the timer counter will wrap around at the same frequency as is being set.
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/// In center-aligned mode (which not all timers support), the wrap-around frequency is effectively halved
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/// because it needs to count up and down.
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fn set_frequency(&mut self, frequency: Hertz) {
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let f = frequency.0;
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let timer_f = Self::frequency().0;
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assert!(f > 0);
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let pclk_ticks_per_timer_period = timer_f / f;
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let psc: u16 = unwrap!(((pclk_ticks_per_timer_period - 1) / (1 << 16)).try_into());
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let divide_by = pclk_ticks_per_timer_period / (u32::from(psc) + 1);
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// the timer counts `0..=arr`, we want it to count `0..divide_by`
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let arr = unwrap!(u16::try_from(divide_by - 1));
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let regs = Self::regs();
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regs.psc().write(|r| r.set_psc(psc));
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regs.arr().write(|r| r.set_arr(arr));
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regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY));
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regs.egr().write(|r| r.set_ug(true));
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regs.cr1().modify(|r| r.set_urs(vals::Urs::ANYEVENT));
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}
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/// Clear update interrupt.
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///
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/// Returns whether the update interrupt flag was set.
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fn clear_update_interrupt(&mut self) -> bool {
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let regs = Self::regs();
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let sr = regs.sr().read();
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if sr.uif() {
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regs.sr().modify(|r| {
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r.set_uif(false);
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});
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true
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} else {
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false
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}
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}
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/// Enable/disable the update interrupt.
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fn enable_update_interrupt(&mut self, enable: bool) {
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Self::regs().dier().modify(|r| r.set_uie(enable));
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}
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/// Enable/disable the update dma.
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fn enable_update_dma(&mut self, enable: bool) {
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Self::regs().dier().modify(|r| r.set_ude(enable));
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}
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/// Enable/disable autoreload preload.
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fn set_autoreload_preload(&mut self, enable: bool) {
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Self::regs().cr1().modify(|r| r.set_arpe(enable));
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}
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/// Get the timer frequency.
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fn get_frequency(&self) -> Hertz {
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let timer_f = Self::frequency();
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let regs = Self::regs();
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let arr = regs.arr().read().arr();
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let psc = regs.psc().read().psc();
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timer_f / arr / (psc + 1)
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}
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}
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/// Gneral-purpose 16-bit timer instance.
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pub trait GeneralPurpose16bitInstance: Basic16bitInstance {
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/// Get access to the general purpose 16bit timer registers.
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///
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/// Note: This works even if the timer is more capable, because registers
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/// for the less capable timers are a subset. This allows writing a driver
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/// for a given set of capabilities, and having it transparently work with
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/// more capable timers.
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fn regs_gp16() -> crate::pac::timer::TimGp16;
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/// Set counting mode.
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fn set_counting_mode(&mut self, mode: CountingMode) {
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let (cms, dir) = mode.into();
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let timer_enabled = Self::regs().cr1().read().cen();
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// Changing from edge aligned to center aligned (and vice versa) is not allowed while the timer is running.
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// Changing direction is discouraged while the timer is running.
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assert!(!timer_enabled);
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Self::regs_gp16().cr1().modify(|r| r.set_dir(dir));
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Self::regs_gp16().cr1().modify(|r| r.set_cms(cms))
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}
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/// Get counting mode.
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fn get_counting_mode(&self) -> CountingMode {
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let cr1 = Self::regs_gp16().cr1().read();
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(cr1.cms(), cr1.dir()).into()
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}
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/// Set clock divider.
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fn set_clock_division(&mut self, ckd: vals::Ckd) {
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Self::regs_gp16().cr1().modify(|r| r.set_ckd(ckd));
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}
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}
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/// Gneral-purpose 32-bit timer instance.
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pub trait GeneralPurpose32bitInstance: GeneralPurpose16bitInstance {
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/// Get access to the general purpose 32bit timer registers.
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///
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/// Note: This works even if the timer is more capable, because registers
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/// for the less capable timers are a subset. This allows writing a driver
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/// for a given set of capabilities, and having it transparently work with
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/// more capable timers.
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fn regs_gp32() -> crate::pac::timer::TimGp32;
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/// Set timer frequency.
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fn set_frequency(&mut self, frequency: Hertz) {
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let f = frequency.0;
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assert!(f > 0);
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let timer_f = Self::frequency().0;
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let pclk_ticks_per_timer_period = (timer_f / f) as u64;
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let psc: u16 = unwrap!(((pclk_ticks_per_timer_period - 1) / (1 << 32)).try_into());
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let arr: u32 = unwrap!((pclk_ticks_per_timer_period / (psc as u64 + 1)).try_into());
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let regs = Self::regs_gp32();
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regs.psc().write(|r| r.set_psc(psc));
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regs.arr().write(|r| r.set_arr(arr));
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regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY));
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regs.egr().write(|r| r.set_ug(true));
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regs.cr1().modify(|r| r.set_urs(vals::Urs::ANYEVENT));
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}
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/// Get timer frequency.
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fn get_frequency(&self) -> Hertz {
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let timer_f = Self::frequency();
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let regs = Self::regs_gp32();
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let arr = regs.arr().read().arr();
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let psc = regs.psc().read().psc();
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timer_f / arr / (psc + 1)
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}
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}
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/// Advanced control timer instance.
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pub trait AdvancedControlInstance: GeneralPurpose16bitInstance {
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/// Get access to the advanced timer registers.
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fn regs_advanced() -> crate::pac::timer::TimAdv;
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}
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/// Capture/Compare 16-bit timer instance.
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pub trait CaptureCompare16bitInstance: GeneralPurpose16bitInstance {
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/// Set input capture filter.
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fn set_input_capture_filter(&mut self, channel: Channel, icf: vals::Icf) {
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let raw_channel = channel.index();
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Self::regs_gp16()
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.ccmr_input(raw_channel / 2)
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.modify(|r| r.set_icf(raw_channel % 2, icf));
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}
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/// Clear input interrupt.
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fn clear_input_interrupt(&mut self, channel: Channel) {
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Self::regs_gp16().sr().modify(|r| r.set_ccif(channel.index(), false));
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}
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/// Enable input interrupt.
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fn enable_input_interrupt(&mut self, channel: Channel, enable: bool) {
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Self::regs_gp16().dier().modify(|r| r.set_ccie(channel.index(), enable));
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}
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/// Set input capture prescaler.
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fn set_input_capture_prescaler(&mut self, channel: Channel, factor: u8) {
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let raw_channel = channel.index();
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Self::regs_gp16()
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.ccmr_input(raw_channel / 2)
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.modify(|r| r.set_icpsc(raw_channel % 2, factor));
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}
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/// Set input TI selection.
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fn set_input_ti_selection(&mut self, channel: Channel, tisel: InputTISelection) {
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let raw_channel = channel.index();
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Self::regs_gp16()
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.ccmr_input(raw_channel / 2)
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.modify(|r| r.set_ccs(raw_channel % 2, tisel.into()));
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}
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/// Set input capture mode.
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fn set_input_capture_mode(&mut self, channel: Channel, mode: InputCaptureMode) {
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Self::regs_gp16().ccer().modify(|r| match mode {
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InputCaptureMode::Rising => {
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r.set_ccnp(channel.index(), false);
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r.set_ccp(channel.index(), false);
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}
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InputCaptureMode::Falling => {
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r.set_ccnp(channel.index(), false);
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r.set_ccp(channel.index(), true);
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}
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InputCaptureMode::BothEdges => {
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r.set_ccnp(channel.index(), true);
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r.set_ccp(channel.index(), true);
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}
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});
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}
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/// Enable timer outputs.
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fn enable_outputs(&mut self);
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/// Set output compare mode.
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fn set_output_compare_mode(&mut self, channel: Channel, mode: OutputCompareMode) {
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let r = Self::regs_gp16();
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let raw_channel: usize = channel.index();
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r.ccmr_output(raw_channel / 2)
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.modify(|w| w.set_ocm(raw_channel % 2, mode.into()));
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}
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/// Set output polarity.
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fn set_output_polarity(&mut self, channel: Channel, polarity: OutputPolarity) {
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Self::regs_gp16()
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.ccer()
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.modify(|w| w.set_ccp(channel.index(), polarity.into()));
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}
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/// Enable/disable a channel.
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fn enable_channel(&mut self, channel: Channel, enable: bool) {
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Self::regs_gp16().ccer().modify(|w| w.set_cce(channel.index(), enable));
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}
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/// Set compare value for a channel.
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fn set_compare_value(&mut self, channel: Channel, value: u16) {
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Self::regs_gp16().ccr(channel.index()).modify(|w| w.set_ccr(value));
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}
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/// Get capture value for a channel.
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fn get_capture_value(&mut self, channel: Channel) -> u16 {
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Self::regs_gp16().ccr(channel.index()).read().ccr()
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}
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/// Get max compare value. This depends on the timer frequency and the clock frequency from RCC.
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fn get_max_compare_value(&self) -> u16 {
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Self::regs_gp16().arr().read().arr()
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}
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/// Get compare value for a channel.
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fn get_compare_value(&self, channel: Channel) -> u16 {
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Self::regs_gp16().ccr(channel.index()).read().ccr()
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}
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/// Set output compare preload.
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fn set_output_compare_preload(&mut self, channel: Channel, preload: bool) {
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let channel_index = channel.index();
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Self::regs_gp16()
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.ccmr_output(channel_index / 2)
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.modify(|w| w.set_ocpe(channel_index % 2, preload));
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}
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}
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/// Capture/Compare 16-bit timer instance with complementary pin support.
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pub trait ComplementaryCaptureCompare16bitInstance: CaptureCompare16bitInstance + AdvancedControlInstance {
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/// Set complementary output polarity.
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fn set_complementary_output_polarity(&mut self, channel: Channel, polarity: OutputPolarity) {
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Self::regs_advanced()
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.ccer()
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.modify(|w| w.set_ccnp(channel.index(), polarity.into()));
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}
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/// Set clock divider for the dead time.
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fn set_dead_time_clock_division(&mut self, value: vals::Ckd) {
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Self::regs_advanced().cr1().modify(|w| w.set_ckd(value));
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}
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/// Set dead time, as a fraction of the max duty value.
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fn set_dead_time_value(&mut self, value: u8) {
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Self::regs_advanced().bdtr().modify(|w| w.set_dtg(value));
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}
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/// Enable/disable a complementary channel.
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fn enable_complementary_channel(&mut self, channel: Channel, enable: bool) {
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Self::regs_advanced()
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.ccer()
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.modify(|w| w.set_ccne(channel.index(), enable));
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}
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}
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/// Capture/Compare 32-bit timer instance.
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pub trait CaptureCompare32bitInstance: GeneralPurpose32bitInstance + CaptureCompare16bitInstance {
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/// Set comapre value for a channel.
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fn set_compare_value(&mut self, channel: Channel, value: u32) {
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Self::regs_gp32().ccr(channel.index()).modify(|w| w.set_ccr(value));
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}
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/// Get capture value for a channel.
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fn get_capture_value(&mut self, channel: Channel) -> u32 {
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Self::regs_gp32().ccr(channel.index()).read().ccr()
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}
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/// Get max compare value. This depends on the timer frequency and the clock frequency from RCC.
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fn get_max_compare_value(&self) -> u32 {
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Self::regs_gp32().arr().read().arr()
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}
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/// Get compare value for a channel.
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fn get_compare_value(&self, channel: Channel) -> u32 {
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Self::regs_gp32().ccr(channel.index()).read().ccr()
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}
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}
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}
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/// Timer channel.
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#[derive(Clone, Copy)]
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pub enum Channel {
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/// Channel 1.
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Ch1,
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/// Channel 2.
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Ch2,
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/// Channel 3.
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Ch3,
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/// Channel 4.
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Ch4,
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}
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impl Channel {
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/// Get the channel index (0..3)
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pub fn index(&self) -> usize {
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match self {
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Channel::Ch1 => 0,
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Channel::Ch2 => 1,
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Channel::Ch3 => 2,
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Channel::Ch4 => 3,
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}
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}
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}
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/// Input capture mode.
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#[derive(Clone, Copy)]
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pub enum InputCaptureMode {
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/// Rising edge only.
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Rising,
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/// Falling edge only.
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Falling,
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/// Both rising or falling edges.
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BothEdges,
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}
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/// Input TI selection.
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#[derive(Clone, Copy)]
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pub enum InputTISelection {
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/// Normal
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Normal,
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/// Alternate
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Alternate,
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/// TRC
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TRC,
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}
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impl From<InputTISelection> for stm32_metapac::timer::vals::CcmrInputCcs {
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fn from(tisel: InputTISelection) -> Self {
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match tisel {
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InputTISelection::Normal => stm32_metapac::timer::vals::CcmrInputCcs::TI4,
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InputTISelection::Alternate => stm32_metapac::timer::vals::CcmrInputCcs::TI3,
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InputTISelection::TRC => stm32_metapac::timer::vals::CcmrInputCcs::TRC,
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}
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}
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}
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/// Timer counting mode.
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#[repr(u8)]
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#[derive(Debug, Clone, Copy, PartialEq, Eq, Default)]
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pub enum CountingMode {
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#[default]
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/// The timer counts up to the reload value and then resets back to 0.
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EdgeAlignedUp,
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/// The timer counts down to 0 and then resets back to the reload value.
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EdgeAlignedDown,
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/// The timer counts up to the reload value and then counts back to 0.
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///
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/// The output compare interrupt flags of channels configured in output are
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/// set when the counter is counting down.
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CenterAlignedDownInterrupts,
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/// The timer counts up to the reload value and then counts back to 0.
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///
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/// The output compare interrupt flags of channels configured in output are
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/// set when the counter is counting up.
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CenterAlignedUpInterrupts,
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/// The timer counts up to the reload value and then counts back to 0.
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///
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/// The output compare interrupt flags of channels configured in output are
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/// set when the counter is counting both up or down.
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CenterAlignedBothInterrupts,
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}
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impl CountingMode {
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/// Return whether this mode is edge-aligned (up or down).
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pub fn is_edge_aligned(&self) -> bool {
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match self {
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CountingMode::EdgeAlignedUp | CountingMode::EdgeAlignedDown => true,
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_ => false,
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}
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}
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/// Return whether this mode is center-aligned.
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pub fn is_center_aligned(&self) -> bool {
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match self {
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CountingMode::CenterAlignedDownInterrupts
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| CountingMode::CenterAlignedUpInterrupts
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| CountingMode::CenterAlignedBothInterrupts => true,
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_ => false,
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}
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}
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}
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impl From<CountingMode> for (vals::Cms, vals::Dir) {
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fn from(value: CountingMode) -> Self {
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match value {
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CountingMode::EdgeAlignedUp => (vals::Cms::EDGEALIGNED, vals::Dir::UP),
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CountingMode::EdgeAlignedDown => (vals::Cms::EDGEALIGNED, vals::Dir::DOWN),
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CountingMode::CenterAlignedDownInterrupts => (vals::Cms::CENTERALIGNED1, vals::Dir::UP),
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CountingMode::CenterAlignedUpInterrupts => (vals::Cms::CENTERALIGNED2, vals::Dir::UP),
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CountingMode::CenterAlignedBothInterrupts => (vals::Cms::CENTERALIGNED3, vals::Dir::UP),
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}
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}
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}
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impl From<(vals::Cms, vals::Dir)> for CountingMode {
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fn from(value: (vals::Cms, vals::Dir)) -> Self {
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match value {
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(vals::Cms::EDGEALIGNED, vals::Dir::UP) => CountingMode::EdgeAlignedUp,
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(vals::Cms::EDGEALIGNED, vals::Dir::DOWN) => CountingMode::EdgeAlignedDown,
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(vals::Cms::CENTERALIGNED1, _) => CountingMode::CenterAlignedDownInterrupts,
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(vals::Cms::CENTERALIGNED2, _) => CountingMode::CenterAlignedUpInterrupts,
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(vals::Cms::CENTERALIGNED3, _) => CountingMode::CenterAlignedBothInterrupts,
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}
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}
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}
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/// Output compare mode.
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#[derive(Clone, Copy)]
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pub enum OutputCompareMode {
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/// The comparison between the output compare register TIMx_CCRx and
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/// the counter TIMx_CNT has no effect on the outputs.
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/// (this mode is used to generate a timing base).
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Frozen,
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/// Set channel to active level on match. OCxREF signal is forced high when the
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/// counter TIMx_CNT matches the capture/compare register x (TIMx_CCRx).
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ActiveOnMatch,
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/// Set channel to inactive level on match. OCxREF signal is forced low when the
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/// counter TIMx_CNT matches the capture/compare register x (TIMx_CCRx).
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InactiveOnMatch,
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/// Toggle - OCxREF toggles when TIMx_CNT=TIMx_CCRx.
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Toggle,
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/// Force inactive level - OCxREF is forced low.
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ForceInactive,
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/// Force active level - OCxREF is forced high.
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ForceActive,
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/// PWM mode 1 - In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRx
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/// else inactive. In downcounting, channel is inactive (OCxREF=0) as long as
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/// TIMx_CNT>TIMx_CCRx else active (OCxREF=1).
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PwmMode1,
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/// PWM mode 2 - In upcounting, channel is inactive as long as
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/// TIMx_CNT<TIMx_CCRx else active. In downcounting, channel is active as long as
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/// TIMx_CNT>TIMx_CCRx else inactive.
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PwmMode2,
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// TODO: there's more modes here depending on the chip family.
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}
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impl From<OutputCompareMode> for stm32_metapac::timer::vals::Ocm {
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fn from(mode: OutputCompareMode) -> Self {
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match mode {
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OutputCompareMode::Frozen => stm32_metapac::timer::vals::Ocm::FROZEN,
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OutputCompareMode::ActiveOnMatch => stm32_metapac::timer::vals::Ocm::ACTIVEONMATCH,
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OutputCompareMode::InactiveOnMatch => stm32_metapac::timer::vals::Ocm::INACTIVEONMATCH,
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OutputCompareMode::Toggle => stm32_metapac::timer::vals::Ocm::TOGGLE,
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OutputCompareMode::ForceInactive => stm32_metapac::timer::vals::Ocm::FORCEINACTIVE,
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OutputCompareMode::ForceActive => stm32_metapac::timer::vals::Ocm::FORCEACTIVE,
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OutputCompareMode::PwmMode1 => stm32_metapac::timer::vals::Ocm::PWMMODE1,
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OutputCompareMode::PwmMode2 => stm32_metapac::timer::vals::Ocm::PWMMODE2,
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}
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}
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}
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/// Timer output pin polarity.
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#[derive(Clone, Copy)]
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pub enum OutputPolarity {
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/// Active high (higher duty value makes the pin spend more time high).
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ActiveHigh,
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/// Active low (higher duty value makes the pin spend more time low).
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ActiveLow,
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}
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impl From<OutputPolarity> for bool {
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fn from(mode: OutputPolarity) -> Self {
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match mode {
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OutputPolarity::ActiveHigh => false,
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OutputPolarity::ActiveLow => true,
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}
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}
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}
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/// Basic 16-bit timer instance.
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pub trait Basic16bitInstance: sealed::Basic16bitInstance + 'static {}
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/// Gneral-purpose 16-bit timer instance.
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pub trait GeneralPurpose16bitInstance: sealed::GeneralPurpose16bitInstance + 'static {}
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/// Gneral-purpose 32-bit timer instance.
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pub trait GeneralPurpose32bitInstance: sealed::GeneralPurpose32bitInstance + 'static {}
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/// Advanced control timer instance.
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pub trait AdvancedControlInstance: sealed::AdvancedControlInstance + 'static {}
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/// Capture/Compare 16-bit timer instance.
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pub trait CaptureCompare16bitInstance:
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sealed::CaptureCompare16bitInstance + GeneralPurpose16bitInstance + 'static
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{
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}
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/// Capture/Compare 16-bit timer instance with complementary pin support.
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pub trait ComplementaryCaptureCompare16bitInstance:
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sealed::ComplementaryCaptureCompare16bitInstance + AdvancedControlInstance + 'static
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{
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}
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/// Capture/Compare 32-bit timer instance.
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pub trait CaptureCompare32bitInstance:
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sealed::CaptureCompare32bitInstance + CaptureCompare16bitInstance + GeneralPurpose32bitInstance + 'static
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{
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}
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pin_trait!(Channel1Pin, CaptureCompare16bitInstance);
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pin_trait!(Channel1ComplementaryPin, CaptureCompare16bitInstance);
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pin_trait!(Channel2Pin, CaptureCompare16bitInstance);
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pin_trait!(Channel2ComplementaryPin, CaptureCompare16bitInstance);
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pin_trait!(Channel3Pin, CaptureCompare16bitInstance);
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pin_trait!(Channel3ComplementaryPin, CaptureCompare16bitInstance);
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pin_trait!(Channel4Pin, CaptureCompare16bitInstance);
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pin_trait!(Channel4ComplementaryPin, CaptureCompare16bitInstance);
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pin_trait!(ExternalTriggerPin, CaptureCompare16bitInstance);
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pin_trait!(BreakInputPin, CaptureCompare16bitInstance);
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pin_trait!(BreakInputComparator1Pin, CaptureCompare16bitInstance);
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pin_trait!(BreakInputComparator2Pin, CaptureCompare16bitInstance);
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pin_trait!(BreakInput2Pin, CaptureCompare16bitInstance);
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pin_trait!(BreakInput2Comparator1Pin, CaptureCompare16bitInstance);
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pin_trait!(BreakInput2Comparator2Pin, CaptureCompare16bitInstance);
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#[allow(unused)]
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macro_rules! impl_basic_16bit_timer {
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($inst:ident, $irq:ident) => {
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impl sealed::Basic16bitInstance for crate::peripherals::$inst {
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type Interrupt = crate::interrupt::typelevel::$irq;
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fn regs() -> crate::pac::timer::TimBasic {
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unsafe { crate::pac::timer::TimBasic::from_ptr(crate::pac::$inst.as_ptr()) }
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}
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}
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};
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}
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#[allow(unused)]
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macro_rules! impl_32bit_timer {
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($inst:ident) => {
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impl sealed::GeneralPurpose32bitInstance for crate::peripherals::$inst {
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fn regs_gp32() -> crate::pac::timer::TimGp32 {
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crate::pac::$inst
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}
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}
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};
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}
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#[allow(unused)]
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macro_rules! impl_compare_capable_16bit {
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($inst:ident) => {
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impl sealed::CaptureCompare16bitInstance for crate::peripherals::$inst {
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fn enable_outputs(&mut self) {}
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}
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};
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}
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foreach_interrupt! {
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($inst:ident, timer, TIM_BASIC, UP, $irq:ident) => {
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impl_basic_16bit_timer!($inst, $irq);
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impl Basic16bitInstance for crate::peripherals::$inst {}
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};
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($inst:ident, timer, TIM_GP16, UP, $irq:ident) => {
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impl_basic_16bit_timer!($inst, $irq);
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impl_compare_capable_16bit!($inst);
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impl Basic16bitInstance for crate::peripherals::$inst {}
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impl GeneralPurpose16bitInstance for crate::peripherals::$inst {}
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impl CaptureCompare16bitInstance for crate::peripherals::$inst {}
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impl sealed::GeneralPurpose16bitInstance for crate::peripherals::$inst {
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fn regs_gp16() -> crate::pac::timer::TimGp16 {
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crate::pac::$inst
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}
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}
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};
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($inst:ident, timer, TIM_GP32, UP, $irq:ident) => {
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impl_basic_16bit_timer!($inst, $irq);
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impl_32bit_timer!($inst);
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impl_compare_capable_16bit!($inst);
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impl Basic16bitInstance for crate::peripherals::$inst {}
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impl CaptureCompare16bitInstance for crate::peripherals::$inst {}
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impl CaptureCompare32bitInstance for crate::peripherals::$inst {}
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impl GeneralPurpose16bitInstance for crate::peripherals::$inst {}
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impl GeneralPurpose32bitInstance for crate::peripherals::$inst {}
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impl sealed::CaptureCompare32bitInstance for crate::peripherals::$inst {}
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impl sealed::GeneralPurpose16bitInstance for crate::peripherals::$inst {
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fn regs_gp16() -> crate::pac::timer::TimGp16 {
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unsafe { crate::pac::timer::TimGp16::from_ptr(crate::pac::$inst.as_ptr()) }
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}
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}
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};
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($inst:ident, timer, TIM_ADV, UP, $irq:ident) => {
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impl_basic_16bit_timer!($inst, $irq);
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impl Basic16bitInstance for crate::peripherals::$inst {}
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impl GeneralPurpose16bitInstance for crate::peripherals::$inst {}
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impl CaptureCompare16bitInstance for crate::peripherals::$inst {}
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impl ComplementaryCaptureCompare16bitInstance for crate::peripherals::$inst {}
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impl AdvancedControlInstance for crate::peripherals::$inst {}
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impl sealed::CaptureCompare16bitInstance for crate::peripherals::$inst {
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fn enable_outputs(&mut self) {
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use crate::timer::sealed::AdvancedControlInstance;
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let r = Self::regs_advanced();
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r.bdtr().modify(|w| w.set_moe(true));
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}
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}
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impl sealed::ComplementaryCaptureCompare16bitInstance for crate::peripherals::$inst {}
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impl sealed::GeneralPurpose16bitInstance for crate::peripherals::$inst {
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fn regs_gp16() -> crate::pac::timer::TimGp16 {
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unsafe { crate::pac::timer::TimGp16::from_ptr(crate::pac::$inst.as_ptr()) }
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}
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}
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impl sealed::AdvancedControlInstance for crate::peripherals::$inst {
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fn regs_advanced() -> crate::pac::timer::TimAdv {
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crate::pac::$inst
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}
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}
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};
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}
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// Update Event trigger DMA for every timer
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dma_trait!(UpDma, Basic16bitInstance);
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