1031 lines
27 KiB
Rust
1031 lines
27 KiB
Rust
#![macro_use]
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use core::convert::Infallible;
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use embassy_hal_common::{impl_peripheral, into_ref, PeripheralRef};
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use crate::pac::gpio::{self, vals};
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use crate::{pac, peripherals, Peripheral};
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/// GPIO flexible pin.
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///
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/// This pin can either be a disconnected, input, or output pin, or both. The level register bit will remain
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/// set while not in output mode, so the pin's level will be 'remembered' when it is not in output
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/// mode.
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pub struct Flex<'d, T: Pin> {
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pub(crate) pin: PeripheralRef<'d, T>,
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}
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impl<'d, T: Pin> Flex<'d, T> {
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/// Wrap the pin in a `Flex`.
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///
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/// The pin remains disconnected. The initial output level is unspecified, but can be changed
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/// before the pin is put into output mode.
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///
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#[inline]
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pub fn new(pin: impl Peripheral<P = T> + 'd) -> Self {
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into_ref!(pin);
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// Pin will be in disconnected state.
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Self { pin }
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}
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#[inline]
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pub fn degrade(self) -> Flex<'d, AnyPin> {
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// Safety: We are about to drop the other copy of this pin, so
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// this clone is safe.
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let pin = unsafe { self.pin.clone_unchecked() };
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// We don't want to run the destructor here, because that would
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// deconfigure the pin.
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core::mem::forget(self);
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Flex {
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pin: pin.map_into::<AnyPin>(),
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}
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}
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/// Put the pin into input mode.
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#[inline]
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pub fn set_as_input(&mut self, pull: Pull) {
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critical_section::with(|_| unsafe {
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let r = self.pin.block();
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let n = self.pin.pin() as usize;
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#[cfg(gpio_v1)]
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{
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let cnf = match pull {
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Pull::Up => {
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r.bsrr().write(|w| w.set_bs(n, true));
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vals::CnfIn::PULL
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}
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Pull::Down => {
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r.bsrr().write(|w| w.set_br(n, true));
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vals::CnfIn::PULL
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}
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Pull::None => vals::CnfIn::FLOATING,
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};
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let crlh = if n < 8 { 0 } else { 1 };
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r.cr(crlh).modify(|w| {
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w.set_mode(n % 8, vals::Mode::INPUT);
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w.set_cnf_in(n % 8, cnf);
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});
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}
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#[cfg(gpio_v2)]
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{
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r.pupdr().modify(|w| w.set_pupdr(n, pull.into()));
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r.otyper().modify(|w| w.set_ot(n, vals::Ot::PUSHPULL));
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r.moder().modify(|w| w.set_moder(n, vals::Moder::INPUT));
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}
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});
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}
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/// Put the pin into output mode.
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///
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/// The pin level will be whatever was set before (or low by default). If you want it to begin
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/// at a specific level, call `set_high`/`set_low` on the pin first.
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#[inline]
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pub fn set_as_output(&mut self, speed: Speed) {
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critical_section::with(|_| unsafe {
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let r = self.pin.block();
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let n = self.pin.pin() as usize;
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#[cfg(gpio_v1)]
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{
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let crlh = if n < 8 { 0 } else { 1 };
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r.cr(crlh).modify(|w| {
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w.set_mode(n % 8, speed.into());
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w.set_cnf_out(n % 8, vals::CnfOut::PUSHPULL);
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});
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}
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#[cfg(gpio_v2)]
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{
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r.pupdr().modify(|w| w.set_pupdr(n, vals::Pupdr::FLOATING));
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r.otyper().modify(|w| w.set_ot(n, vals::Ot::PUSHPULL));
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self.pin.set_speed(speed);
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r.moder().modify(|w| w.set_moder(n, vals::Moder::OUTPUT));
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}
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});
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}
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/// Put the pin into input + output mode.
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///
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/// This is commonly used for "open drain" mode.
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/// the hardware will drive the line low if you set it to low, and will leave it floating if you set
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/// it to high, in which case you can read the input to figure out whether another device
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/// is driving the line low.
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///
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/// The pin level will be whatever was set before (or low by default). If you want it to begin
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/// at a specific level, call `set_high`/`set_low` on the pin first.
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#[inline]
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pub fn set_as_input_output(&mut self, speed: Speed, pull: Pull) {
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critical_section::with(|_| unsafe {
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let r = self.pin.block();
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let n = self.pin.pin() as usize;
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#[cfg(gpio_v1)]
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{
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let crlh = if n < 8 { 0 } else { 1 };
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match pull {
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Pull::Up => r.bsrr().write(|w| w.set_bs(n, true)),
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Pull::Down => r.bsrr().write(|w| w.set_br(n, true)),
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Pull::None => {}
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}
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r.cr(crlh).modify(|w| w.set_mode(n % 8, speed.into()));
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r.cr(crlh).modify(|w| w.set_cnf_out(n % 8, vals::CnfOut::OPENDRAIN));
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}
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#[cfg(gpio_v2)]
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{
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r.pupdr().modify(|w| w.set_pupdr(n, pull.into()));
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r.otyper().modify(|w| w.set_ot(n, vals::Ot::OPENDRAIN));
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self.pin.set_speed(speed);
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r.moder().modify(|w| w.set_moder(n, vals::Moder::OUTPUT));
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}
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});
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}
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#[inline]
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pub fn is_high(&self) -> bool {
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!self.is_low()
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}
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#[inline]
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pub fn is_low(&self) -> bool {
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let state = unsafe { self.pin.block().idr().read().idr(self.pin.pin() as _) };
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state == vals::Idr::LOW
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}
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#[inline]
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pub fn get_level(&self) -> Level {
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self.is_high().into()
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}
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#[inline]
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pub fn is_set_high(&self) -> bool {
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!self.is_set_low()
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}
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/// Is the output pin set as low?
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#[inline]
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pub fn is_set_low(&self) -> bool {
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let state = unsafe { self.pin.block().odr().read().odr(self.pin.pin() as _) };
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state == vals::Odr::LOW
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}
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/// What level output is set to
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#[inline]
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pub fn get_output_level(&self) -> Level {
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self.is_set_high().into()
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}
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#[inline]
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pub fn set_high(&mut self) {
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self.pin.set_high();
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}
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/// Set the output as low.
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#[inline]
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pub fn set_low(&mut self) {
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self.pin.set_low();
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}
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#[inline]
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pub fn set_level(&mut self, level: Level) {
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match level {
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Level::Low => self.pin.set_low(),
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Level::High => self.pin.set_high(),
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}
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}
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/// Toggle pin output
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#[inline]
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pub fn toggle(&mut self) {
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if self.is_set_low() {
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self.set_high()
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} else {
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self.set_low()
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}
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}
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}
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impl<'d, T: Pin> Drop for Flex<'d, T> {
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#[inline]
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fn drop(&mut self) {
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critical_section::with(|_| unsafe {
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let r = self.pin.block();
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let n = self.pin.pin() as usize;
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#[cfg(gpio_v1)]
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{
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let crlh = if n < 8 { 0 } else { 1 };
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r.cr(crlh).modify(|w| {
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w.set_mode(n % 8, vals::Mode::INPUT);
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w.set_cnf_in(n % 8, vals::CnfIn::FLOATING);
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});
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}
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#[cfg(gpio_v2)]
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{
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r.pupdr().modify(|w| w.set_pupdr(n, vals::Pupdr::FLOATING));
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r.moder().modify(|w| w.set_moder(n, vals::Moder::INPUT));
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}
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});
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}
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}
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/// Pull setting for an input.
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#[derive(Debug, Eq, PartialEq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Pull {
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None,
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Up,
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Down,
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}
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#[cfg(gpio_v2)]
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impl From<Pull> for vals::Pupdr {
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fn from(pull: Pull) -> Self {
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use Pull::*;
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match pull {
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None => vals::Pupdr::FLOATING,
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Up => vals::Pupdr::PULLUP,
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Down => vals::Pupdr::PULLDOWN,
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}
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}
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}
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/// Speed settings
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#[derive(Debug, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Speed {
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Low,
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Medium,
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#[cfg(not(any(syscfg_f0, gpio_v1)))]
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High,
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VeryHigh,
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}
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#[cfg(gpio_v1)]
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impl From<Speed> for vals::Mode {
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fn from(speed: Speed) -> Self {
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use Speed::*;
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match speed {
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Low => vals::Mode::OUTPUT2MHZ,
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Medium => vals::Mode::OUTPUT10MHZ,
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VeryHigh => vals::Mode::OUTPUT50MHZ,
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}
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}
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}
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#[cfg(gpio_v2)]
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impl From<Speed> for vals::Ospeedr {
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fn from(speed: Speed) -> Self {
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use Speed::*;
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match speed {
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Low => vals::Ospeedr::LOWSPEED,
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Medium => vals::Ospeedr::MEDIUMSPEED,
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#[cfg(not(syscfg_f0))]
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High => vals::Ospeedr::HIGHSPEED,
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VeryHigh => vals::Ospeedr::VERYHIGHSPEED,
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}
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}
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}
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/// GPIO input driver.
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pub struct Input<'d, T: Pin> {
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pub(crate) pin: Flex<'d, T>,
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}
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impl<'d, T: Pin> Input<'d, T> {
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#[inline]
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pub fn new(pin: impl Peripheral<P = T> + 'd, pull: Pull) -> Self {
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let mut pin = Flex::new(pin);
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pin.set_as_input(pull);
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Self { pin }
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}
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#[inline]
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pub fn degrade(self) -> Input<'d, AnyPin> {
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Input {
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pin: self.pin.degrade(),
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}
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}
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#[inline]
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pub fn is_high(&self) -> bool {
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self.pin.is_high()
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}
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#[inline]
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pub fn is_low(&self) -> bool {
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self.pin.is_low()
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}
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#[inline]
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pub fn get_level(&self) -> Level {
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self.pin.get_level()
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}
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}
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/// Digital input or output level.
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#[derive(Debug, Eq, PartialEq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Level {
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Low,
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High,
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}
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impl From<bool> for Level {
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fn from(val: bool) -> Self {
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match val {
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true => Self::High,
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false => Self::Low,
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}
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}
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}
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impl Into<bool> for Level {
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fn into(self) -> bool {
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match self {
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Level::Low => false,
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Level::High => true,
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}
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}
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}
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/// GPIO output driver.
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pub struct Output<'d, T: Pin> {
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pub(crate) pin: Flex<'d, T>,
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}
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impl<'d, T: Pin> Output<'d, T> {
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#[inline]
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pub fn new(pin: impl Peripheral<P = T> + 'd, initial_output: Level, speed: Speed) -> Self {
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let mut pin = Flex::new(pin);
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match initial_output {
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Level::High => pin.set_high(),
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Level::Low => pin.set_low(),
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}
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pin.set_as_output(speed);
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Self { pin }
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}
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#[inline]
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pub fn degrade(self) -> Output<'d, AnyPin> {
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Output {
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pin: self.pin.degrade(),
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}
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}
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/// Set the output as high.
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#[inline]
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pub fn set_high(&mut self) {
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self.pin.set_high();
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}
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/// Set the output as low.
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#[inline]
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pub fn set_low(&mut self) {
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self.pin.set_low();
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}
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/// Set the output level.
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#[inline]
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pub fn set_level(&mut self, level: Level) {
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self.pin.set_level(level)
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}
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/// Is the output pin set as high?
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#[inline]
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pub fn is_set_high(&self) -> bool {
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self.pin.is_set_high()
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}
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/// Is the output pin set as low?
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#[inline]
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pub fn is_set_low(&self) -> bool {
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self.pin.is_set_low()
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}
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/// What level output is set to
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#[inline]
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pub fn get_output_level(&self) -> Level {
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self.pin.get_output_level()
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}
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/// Toggle pin output
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#[inline]
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pub fn toggle(&mut self) {
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self.pin.toggle();
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}
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}
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/// GPIO output open-drain driver.
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pub struct OutputOpenDrain<'d, T: Pin> {
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pub(crate) pin: Flex<'d, T>,
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}
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impl<'d, T: Pin> OutputOpenDrain<'d, T> {
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#[inline]
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pub fn new(pin: impl Peripheral<P = T> + 'd, initial_output: Level, speed: Speed, pull: Pull) -> Self {
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let mut pin = Flex::new(pin);
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match initial_output {
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Level::High => pin.set_high(),
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Level::Low => pin.set_low(),
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}
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pin.set_as_input_output(speed, pull);
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Self { pin }
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}
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#[inline]
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pub fn degrade(self) -> Output<'d, AnyPin> {
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Output {
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pin: self.pin.degrade(),
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}
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}
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#[inline]
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pub fn is_high(&self) -> bool {
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!self.pin.is_low()
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}
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#[inline]
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pub fn is_low(&self) -> bool {
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self.pin.is_low()
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}
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/// Returns current pin level
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#[inline]
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pub fn get_level(&self) -> Level {
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self.pin.get_level()
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}
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/// Set the output as high.
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#[inline]
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pub fn set_high(&mut self) {
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self.pin.set_high();
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}
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/// Set the output as low.
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#[inline]
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pub fn set_low(&mut self) {
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self.pin.set_low();
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}
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/// Set the output level.
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#[inline]
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pub fn set_level(&mut self, level: Level) {
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self.pin.set_level(level);
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}
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/// Is the output pin set as high?
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#[inline]
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pub fn is_set_high(&self) -> bool {
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self.pin.is_set_high()
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}
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/// Is the output pin set as low?
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#[inline]
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pub fn is_set_low(&self) -> bool {
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self.pin.is_set_low()
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}
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/// What level output is set to
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#[inline]
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pub fn get_output_level(&self) -> Level {
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self.pin.get_output_level()
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}
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/// Toggle pin output
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#[inline]
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pub fn toggle(&mut self) {
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self.pin.toggle()
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}
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}
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pub(crate) mod sealed {
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use super::*;
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/// Alternate function type settings
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#[derive(Debug, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum AFType {
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Input,
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OutputPushPull,
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OutputOpenDrain,
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}
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pub trait Pin {
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fn pin_port(&self) -> u8;
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#[inline]
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fn _pin(&self) -> u8 {
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self.pin_port() % 16
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}
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#[inline]
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fn _port(&self) -> u8 {
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self.pin_port() / 16
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}
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#[inline]
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fn block(&self) -> gpio::Gpio {
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pac::GPIO(self._port() as _)
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}
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/// Set the output as high.
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#[inline]
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fn set_high(&self) {
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unsafe {
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let n = self._pin() as _;
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self.block().bsrr().write(|w| w.set_bs(n, true));
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}
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}
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/// Set the output as low.
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#[inline]
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fn set_low(&self) {
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unsafe {
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let n = self._pin() as _;
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self.block().bsrr().write(|w| w.set_br(n, true));
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}
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}
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#[inline]
|
|
unsafe fn set_as_af(&self, af_num: u8, af_type: AFType) {
|
|
self.set_as_af_pull(af_num, af_type, Pull::None);
|
|
}
|
|
|
|
#[cfg(gpio_v1)]
|
|
#[inline]
|
|
unsafe fn set_as_af_pull(&self, _af_num: u8, af_type: AFType, pull: Pull) {
|
|
// F1 uses the AFIO register for remapping.
|
|
// For now, this is not implemented, so af_num is ignored
|
|
// _af_num should be zero here, since it is not set by stm32-data
|
|
let r = self.block();
|
|
let n = self._pin() as usize;
|
|
let crlh = if n < 8 { 0 } else { 1 };
|
|
match af_type {
|
|
AFType::Input => {
|
|
let cnf = match pull {
|
|
Pull::Up => {
|
|
r.bsrr().write(|w| w.set_bs(n, true));
|
|
vals::CnfIn::PULL
|
|
}
|
|
Pull::Down => {
|
|
r.bsrr().write(|w| w.set_br(n, true));
|
|
vals::CnfIn::PULL
|
|
}
|
|
Pull::None => vals::CnfIn::FLOATING,
|
|
};
|
|
|
|
r.cr(crlh).modify(|w| {
|
|
w.set_mode(n % 8, vals::Mode::INPUT);
|
|
w.set_cnf_in(n % 8, cnf);
|
|
});
|
|
}
|
|
AFType::OutputPushPull => {
|
|
r.cr(crlh).modify(|w| {
|
|
w.set_mode(n % 8, vals::Mode::OUTPUT50MHZ);
|
|
w.set_cnf_out(n % 8, vals::CnfOut::ALTPUSHPULL);
|
|
});
|
|
}
|
|
AFType::OutputOpenDrain => {
|
|
r.cr(crlh).modify(|w| {
|
|
w.set_mode(n % 8, vals::Mode::OUTPUT50MHZ);
|
|
w.set_cnf_out(n % 8, vals::CnfOut::ALTOPENDRAIN);
|
|
});
|
|
}
|
|
}
|
|
}
|
|
|
|
#[cfg(gpio_v2)]
|
|
#[inline]
|
|
unsafe fn set_as_af_pull(&self, af_num: u8, af_type: AFType, pull: Pull) {
|
|
let pin = self._pin() as usize;
|
|
let block = self.block();
|
|
block.afr(pin / 8).modify(|w| w.set_afr(pin % 8, af_num));
|
|
match af_type {
|
|
AFType::Input => {}
|
|
AFType::OutputPushPull => block.otyper().modify(|w| w.set_ot(pin, vals::Ot::PUSHPULL)),
|
|
AFType::OutputOpenDrain => block.otyper().modify(|w| w.set_ot(pin, vals::Ot::OPENDRAIN)),
|
|
}
|
|
block.pupdr().modify(|w| w.set_pupdr(pin, pull.into()));
|
|
|
|
block.moder().modify(|w| w.set_moder(pin, vals::Moder::ALTERNATE));
|
|
}
|
|
|
|
#[inline]
|
|
unsafe fn set_as_analog(&self) {
|
|
let pin = self._pin() as usize;
|
|
let block = self.block();
|
|
#[cfg(gpio_v1)]
|
|
{
|
|
let crlh = if pin < 8 { 0 } else { 1 };
|
|
block.cr(crlh).modify(|w| {
|
|
w.set_mode(pin % 8, vals::Mode::INPUT);
|
|
w.set_cnf_in(pin % 8, vals::CnfIn::ANALOG);
|
|
});
|
|
}
|
|
#[cfg(gpio_v2)]
|
|
block.moder().modify(|w| w.set_moder(pin, vals::Moder::ANALOG));
|
|
}
|
|
|
|
/// Set the pin as "disconnected", ie doing nothing and consuming the lowest
|
|
/// amount of power possible.
|
|
///
|
|
/// This is currently the same as set_as_analog but is semantically different really.
|
|
/// Drivers should set_as_disconnected pins when dropped.
|
|
#[inline]
|
|
unsafe fn set_as_disconnected(&self) {
|
|
self.set_as_analog();
|
|
}
|
|
|
|
#[inline]
|
|
unsafe fn set_speed(&self, speed: Speed) {
|
|
let pin = self._pin() as usize;
|
|
|
|
#[cfg(gpio_v1)]
|
|
{
|
|
let crlh = if pin < 8 { 0 } else { 1 };
|
|
self.block().cr(crlh).modify(|w| {
|
|
w.set_mode(pin % 8, speed.into());
|
|
});
|
|
}
|
|
|
|
#[cfg(gpio_v2)]
|
|
self.block().ospeedr().modify(|w| w.set_ospeedr(pin, speed.into()));
|
|
}
|
|
}
|
|
}
|
|
|
|
pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + sealed::Pin + Sized + 'static {
|
|
#[cfg(feature = "exti")]
|
|
type ExtiChannel: crate::exti::Channel;
|
|
|
|
/// Number of the pin within the port (0..31)
|
|
#[inline]
|
|
fn pin(&self) -> u8 {
|
|
self._pin()
|
|
}
|
|
|
|
/// Port of the pin
|
|
#[inline]
|
|
fn port(&self) -> u8 {
|
|
self._port()
|
|
}
|
|
|
|
/// Convert from concrete pin type PX_XX to type erased `AnyPin`.
|
|
#[inline]
|
|
fn degrade(self) -> AnyPin {
|
|
AnyPin {
|
|
pin_port: self.pin_port(),
|
|
}
|
|
}
|
|
}
|
|
|
|
// Type-erased GPIO pin
|
|
pub struct AnyPin {
|
|
pin_port: u8,
|
|
}
|
|
|
|
impl AnyPin {
|
|
#[inline]
|
|
pub unsafe fn steal(pin_port: u8) -> Self {
|
|
Self { pin_port }
|
|
}
|
|
|
|
#[inline]
|
|
fn _port(&self) -> u8 {
|
|
self.pin_port / 16
|
|
}
|
|
|
|
#[inline]
|
|
pub fn block(&self) -> gpio::Gpio {
|
|
pac::GPIO(self._port() as _)
|
|
}
|
|
}
|
|
|
|
impl_peripheral!(AnyPin);
|
|
impl Pin for AnyPin {
|
|
#[cfg(feature = "exti")]
|
|
type ExtiChannel = crate::exti::AnyChannel;
|
|
}
|
|
impl sealed::Pin for AnyPin {
|
|
#[inline]
|
|
fn pin_port(&self) -> u8 {
|
|
self.pin_port
|
|
}
|
|
}
|
|
|
|
// ====================
|
|
|
|
foreach_pin!(
|
|
($pin_name:ident, $port_name:ident, $port_num:expr, $pin_num:expr, $exti_ch:ident) => {
|
|
impl Pin for peripherals::$pin_name {
|
|
#[cfg(feature = "exti")]
|
|
type ExtiChannel = peripherals::$exti_ch;
|
|
}
|
|
impl sealed::Pin for peripherals::$pin_name {
|
|
#[inline]
|
|
fn pin_port(&self) -> u8 {
|
|
$port_num * 16 + $pin_num
|
|
}
|
|
}
|
|
|
|
impl From<peripherals::$pin_name> for AnyPin {
|
|
fn from(x: peripherals::$pin_name) -> Self {
|
|
x.degrade()
|
|
}
|
|
}
|
|
};
|
|
);
|
|
|
|
pub(crate) unsafe fn init() {
|
|
crate::_generated::init_gpio();
|
|
}
|
|
|
|
mod eh02 {
|
|
use embedded_hal_02::digital::v2::{InputPin, OutputPin, StatefulOutputPin, ToggleableOutputPin};
|
|
|
|
use super::*;
|
|
|
|
impl<'d, T: Pin> InputPin for Input<'d, T> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> OutputPin for Output<'d, T> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> StatefulOutputPin for Output<'d, T> {
|
|
#[inline]
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
/// Is the output pin set as low?
|
|
#[inline]
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> ToggleableOutputPin for Output<'d, T> {
|
|
type Error = Infallible;
|
|
#[inline]
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> OutputPin for OutputOpenDrain<'d, T> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> StatefulOutputPin for OutputOpenDrain<'d, T> {
|
|
#[inline]
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
/// Is the output pin set as low?
|
|
#[inline]
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> ToggleableOutputPin for OutputOpenDrain<'d, T> {
|
|
type Error = Infallible;
|
|
#[inline]
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> InputPin for Flex<'d, T> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> OutputPin for Flex<'d, T> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> StatefulOutputPin for Flex<'d, T> {
|
|
#[inline]
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
/// Is the output pin set as low?
|
|
#[inline]
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> ToggleableOutputPin for Flex<'d, T> {
|
|
type Error = Infallible;
|
|
#[inline]
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
}
|
|
|
|
#[cfg(feature = "unstable-traits")]
|
|
mod eh1 {
|
|
use embedded_hal_1::digital::{ErrorType, InputPin, OutputPin, StatefulOutputPin, ToggleableOutputPin};
|
|
|
|
use super::*;
|
|
|
|
impl<'d, T: Pin> ErrorType for Input<'d, T> {
|
|
type Error = Infallible;
|
|
}
|
|
|
|
impl<'d, T: Pin> InputPin for Input<'d, T> {
|
|
#[inline]
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> ErrorType for Output<'d, T> {
|
|
type Error = Infallible;
|
|
}
|
|
|
|
impl<'d, T: Pin> OutputPin for Output<'d, T> {
|
|
#[inline]
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> StatefulOutputPin for Output<'d, T> {
|
|
#[inline]
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
/// Is the output pin set as low?
|
|
#[inline]
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> ToggleableOutputPin for Output<'d, T> {
|
|
#[inline]
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> ErrorType for OutputOpenDrain<'d, T> {
|
|
type Error = Infallible;
|
|
}
|
|
|
|
impl<'d, T: Pin> OutputPin for OutputOpenDrain<'d, T> {
|
|
#[inline]
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> StatefulOutputPin for OutputOpenDrain<'d, T> {
|
|
#[inline]
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
/// Is the output pin set as low?
|
|
#[inline]
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> ToggleableOutputPin for OutputOpenDrain<'d, T> {
|
|
#[inline]
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> InputPin for Flex<'d, T> {
|
|
#[inline]
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> OutputPin for Flex<'d, T> {
|
|
#[inline]
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.set_low())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> ToggleableOutputPin for Flex<'d, T> {
|
|
#[inline]
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
Ok(self.toggle())
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Pin> ErrorType for Flex<'d, T> {
|
|
type Error = Infallible;
|
|
}
|
|
|
|
impl<'d, T: Pin> StatefulOutputPin for Flex<'d, T> {
|
|
#[inline]
|
|
fn is_set_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_high())
|
|
}
|
|
|
|
/// Is the output pin set as low?
|
|
#[inline]
|
|
fn is_set_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self.is_set_low())
|
|
}
|
|
}
|
|
}
|
|
|
|
#[cfg(feature = "unstable-pac")]
|
|
pub mod low_level {
|
|
pub use super::sealed::*;
|
|
}
|