NaxdyOrg/wiringop-rs
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gpio: fix pwm modes

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This commit is contained in:
Naxdy 2024-11-02 13:13:04 +01:00
parent bf2e311eaa
commit 3fd0b622f8
Signed by: Naxdy
GPG key ID: CC15075846BCE91B
1 changed files with 7 additions and 2 deletions

9
src/gpio.rs
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@ -4,7 +4,11 @@ use thiserror::Error;
use crate::{
ensure_library_setup,
ffi::{self, HIGH, INPUT, LOW, OUTPUT, PUD_DOWN, PUD_OFF, PUD_UP, PWM_OUTPUT},
ffi::{
self, HIGH, INPUT, LOW, OUTPUT, PUD_DOWN, PUD_OFF, PUD_UP, PWM_CLK_DIV_120,
PWM_CLK_DIV_12K, PWM_CLK_DIV_180, PWM_CLK_DIV_240, PWM_CLK_DIV_24K, PWM_CLK_DIV_360,
PWM_CLK_DIV_36K, PWM_CLK_DIV_480, PWM_CLK_DIV_48K, PWM_CLK_DIV_72K, PWM_OUTPUT,
},
};
static PINS_HANDED_OUT: Mutex<Vec<i32>> = Mutex::new(Vec::new());
@ -36,7 +40,8 @@ impl TryFrom<i32> for PinMode {
match value as u32 {
INPUT => Ok(PinMode::Input),
OUTPUT => Ok(PinMode::Output),
PWM_OUTPUT => Ok(PinMode::PwmOutput),
PWM_OUTPUT | PWM_CLK_DIV_12K | PWM_CLK_DIV_24K | PWM_CLK_DIV_360 | PWM_CLK_DIV_36K
| PWM_CLK_DIV_480 | PWM_CLK_DIV_48K | PWM_CLK_DIV_72K => Ok(PinMode::PwmOutput),
_ => Err(GpioError::ValueParseError(value)),
}
}