R/ARMeilleure/Decoders/OpCode32SimdShImm.cs
LDj3SNuD 04e330cc00
Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths). (#1577)
* Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths).

No test provided (i.e. draft).

* Ptc InternalVersion = 1577
2020-10-13 22:41:33 +02:00

43 lines
1.2 KiB
C#

namespace ARMeilleure.Decoders
{
class OpCode32SimdShImm : OpCode32Simd
{
public int Shift { get; private set; }
public OpCode32SimdShImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
{
int imm6 = (opCode >> 16) & 0x3f;
int limm6 = ((opCode >> 1) & 0x40) | imm6;
if ((limm6 & 0x40) == 0b1000000)
{
Size = 3;
Shift = imm6;
}
else if ((limm6 & 0x60) == 0b0100000)
{
Size = 2;
Shift = imm6 - 32;
}
else if ((limm6 & 0x70) == 0b0010000)
{
Size = 1;
Shift = imm6 - 16;
}
else if ((limm6 & 0x78) == 0b0001000)
{
Size = 0;
Shift = imm6 - 8;
}
else
{
Instruction = InstDescriptor.Undefined;
}
if (GetType() == typeof(OpCode32SimdShImm) && DecoderHelper.VectorArgumentsInvalid(Q, Vd, Vm))
{
Instruction = InstDescriptor.Undefined;
}
}
}
}