forked from Mirror/Ryujinx
fb0939f9b6
* Implement SMULWB, SMULWT, SMLAWB, SMLAWT, and add tests for some multiply instructions * Improve test descriptions * Rename SMULH to SMUL__ * Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions * Fix new tests * Replace AND 0xFFFF with 16-bits zero extension (more efficient)
140 lines
5.5 KiB
C#
140 lines
5.5 KiB
C#
#define Mul32
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using NUnit.Framework;
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using System;
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namespace Ryujinx.Tests.Cpu
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{
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[Category("Mul32")]
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public sealed class CpuTestMul32 : CpuTest32
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{
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#if Mul32
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#region "ValueSource (Opcodes)"
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private static uint[] _Smlabb_Smlabt_Smlatb_Smlatt_()
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{
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return new uint[]
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{
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0xe1000080u, // SMLABB R0, R0, R0, R0
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0xe10000C0u, // SMLABT R0, R0, R0, R0
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0xe10000A0u, // SMLATB R0, R0, R0, R0
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0xe10000E0u, // SMLATT R0, R0, R0, R0
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};
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}
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private static uint[] _Smlawb_Smlawt_()
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{
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return new uint[]
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{
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0xe1200080u, // SMLAWB R0, R0, R0, R0
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0xe12000C0u, // SMLAWT R0, R0, R0, R0
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};
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}
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private static uint[] _Smulbb_Smulbt_Smultb_Smultt_()
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{
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return new uint[]
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{
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0xe1600080u, // SMULBB R0, R0, R0
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0xe16000C0u, // SMULBT R0, R0, R0
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0xe16000A0u, // SMULTB R0, R0, R0
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0xe16000E0u, // SMULTT R0, R0, R0
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};
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}
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private static uint[] _Smulwb_Smulwt_()
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{
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return new uint[]
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{
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0xe12000a0u, // SMULWB R0, R0, R0
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0xe12000e0u, // SMULWT R0, R0, R0
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};
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}
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#endregion
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private const int RndCnt = 2;
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[Test, Pairwise, Description("SMLA<x><y> <Rd>, <Rn>, <Rm>, <Ra>")]
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public void Smla___32bit([ValueSource("_Smlabb_Smlabt_Smlatb_Smlatt_")] uint opcode,
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[Values(0u, 0xdu)] uint rn,
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[Values(1u, 0xdu)] uint rm,
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[Values(2u, 0xdu)] uint ra,
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[Values(3u, 0xdu)] uint rd,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wa)
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{
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opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((ra & 15) << 12) | ((rd & 15) << 16);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, r0: wn, r1: wm, r2: wa, sp: w31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("SMLAW<x> <Rd>, <Rn>, <Rm>, <Ra>")]
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public void Smlaw__32bit([ValueSource("_Smlawb_Smlawt_")] uint opcode,
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[Values(0u, 0xdu)] uint rn,
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[Values(1u, 0xdu)] uint rm,
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[Values(2u, 0xdu)] uint ra,
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[Values(3u, 0xdu)] uint rd,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wa)
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{
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opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((ra & 15) << 12) | ((rd & 15) << 16);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, r0: wn, r1: wm, r2: wa, sp: w31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("SMUL<x><y> <Rd>, <Rn>, <Rm>")]
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public void Smul___32bit([ValueSource("_Smulbb_Smulbt_Smultb_Smultt_")] uint opcode,
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[Values(0u, 0xdu)] uint rn,
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[Values(1u, 0xdu)] uint rm,
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[Values(2u, 0xdu)] uint rd,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm)
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{
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opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((rd & 15) << 16);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, r0: wn, r1: wm, sp: w31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("SMULW<x> <Rd>, <Rn>, <Rm>")]
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public void Smulw__32bit([ValueSource("_Smulwb_Smulwt_")] uint opcode,
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[Values(0u, 0xdu)] uint rn,
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[Values(1u, 0xdu)] uint rm,
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[Values(2u, 0xdu)] uint rd,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm)
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{
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opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((rd & 15) << 16);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, r0: wn, r1: wm, sp: w31);
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CompareAgainstUnicorn();
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}
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#endif
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}
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}
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