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R/Ryujinx/Cpu/Instruction
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gdkchan 6a3aa6cd88 Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions
2018-02-09 00:26:20 -03:00
..
AInst.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitAlu.cs Add ADC and SBC instructions 2018-02-07 20:46:36 -03:00
AInstEmitAluHelper.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitBfm.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitCcmp.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitCsel.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitException.cs Implement SSHL instruction, fix exception on FMAX/FMIN, and use a better exception message for undefined/unimplemented instructions 2018-02-07 09:38:43 -03:00
AInstEmitFlow.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitMemory.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitMemoryEx.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitMemoryHelper.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitMove.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitMul.cs aloha 2018-02-04 20:08:20 -03:00
AInstEmitScalar.cs Add FMADD and FMSUB instructions 2018-02-07 20:07:16 -03:00
AInstEmitSimd.cs Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions 2018-02-09 00:26:20 -03:00
AInstEmitSystem.cs Improve access to system registers by using properties, also use exclusive region granularity on exclusive load/stores, and ensure that acquires without releases won't hold the address forever, remove unused ALU rev method 2018-02-06 12:15:08 -03:00
AInstEmitter.cs aloha 2018-02-04 20:08:20 -03:00
ASoftFallback.cs Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions 2018-02-09 00:26:20 -03:00