forked from Mirror/Ryujinx
7b35ebc64a
* T32: Implement ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORN, ORR, RSB, SBC, SUB, TEQ, TST (shifted register) * OpCodeTable: Sort T32 list * Tests: Rename RandomTestCase to PrecomputedThumbTestCase * T32: Tests for AluRsImm instructions * fix nit * fix nit 2
20 lines
No EOL
588 B
C#
20 lines
No EOL
588 B
C#
namespace ARMeilleure.Decoders
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{
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class OpCodeT32Alu : OpCodeT32, IOpCode32Alu
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{
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public int Rd { get; }
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public int Rn { get; }
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public bool? SetFlags { get; }
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public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32Alu(inst, address, opCode);
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public OpCodeT32Alu(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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Rd = (opCode >> 8) & 0xf;
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Rn = (opCode >> 16) & 0xf;
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SetFlags = ((opCode >> 20) & 1) != 0;
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}
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}
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} |