JinxRyu/Ryujinx/Cpu
2018-02-10 14:20:46 -03:00
..
Decoder Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
Exceptions Fixes to memory management 2018-02-09 21:13:18 -03:00
Instruction Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
Memory Fixes to memory management 2018-02-09 21:13:18 -03:00
State Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
Translation Support loading NSO/NRO without a MOD0 header, stub some functions, support more ids on SvcGetInfo 2018-02-06 20:28:32 -03:00
ABitUtils.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeTable.cs Add BRK on the opcode table 2018-02-10 12:16:48 -03:00
AOptimizations.cs Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions 2018-02-09 00:26:20 -03:00
AThread.cs aloha 2018-02-04 20:08:20 -03:00
ATranslatedSub.cs aloha 2018-02-04 20:08:20 -03:00
ATranslator.cs aloha 2018-02-04 20:08:20 -03:00