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JinxRyu/Ryujinx/OsHle
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gdkchan 7c314eadcf Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?)
2018-02-15 01:32:25 -03:00
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Exceptions Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
Handles Made initial implementation of the thread scheduler, refactor Svc to avoid passing many arguments 2018-02-13 23:43:08 -03:00
Ipc Add SHRN instruction, and fix ADDV 2018-02-14 02:43:21 -03:00
Objects Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?) 2018-02-15 01:32:25 -03:00
Services Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?) 2018-02-15 01:32:25 -03:00
Svc Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?) 2018-02-15 01:32:25 -03:00
Utilities aloha 2018-02-04 20:08:20 -03:00
CondVar.cs Made initial implementation of the thread scheduler, refactor Svc to avoid passing many arguments 2018-02-13 23:43:08 -03:00
Display.cs aloha 2018-02-04 20:08:20 -03:00
FileDesc.cs aloha 2018-02-04 20:08:20 -03:00
Horizon.cs Made initial implementation of the thread scheduler, refactor Svc to avoid passing many arguments 2018-02-13 23:43:08 -03:00
MemoryInfo.cs Fixes to memory management 2018-02-09 21:13:18 -03:00
MemoryType.cs aloha 2018-02-04 20:08:20 -03:00
Mutex.cs Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?) 2018-02-15 01:32:25 -03:00
Process.cs Add SHRN instruction, and fix ADDV 2018-02-14 02:43:21 -03:00
ServiceCtx.cs Add BRK instruction, fix wrong namespace on one of Am interfaces, and disable Debug/Trace logs by default 2018-02-10 10:24:16 -03:00