forked from Mirror/Ryujinx
54 lines
2.2 KiB
C#
54 lines
2.2 KiB
C#
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using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.Translation;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitAluHelper;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Instructions
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{
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static partial class InstEmit
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{
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public static void Pset(EmitterContext context)
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{
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InstPset op = context.GetOp<InstPset>();
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Operand srcA = context.BitwiseNot(Register(op.Src2Pred, RegisterType.Predicate), op.Src2PredInv);
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Operand srcB = context.BitwiseNot(Register(op.Src1Pred, RegisterType.Predicate), op.Src1PredInv);
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Operand srcC = context.BitwiseNot(Register(op.SrcPred, RegisterType.Predicate), op.SrcPredInv);
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Operand res = GetPredLogicalOp(context, op.BoolOpAB, srcA, srcB);
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res = GetPredLogicalOp(context, op.BoolOpC, res, srcC);
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Operand dest = GetDest(op.Dest);
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if (op.BVal)
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{
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context.Copy(dest, context.ConditionalSelect(res, ConstF(1), Const(0)));
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}
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else
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{
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context.Copy(dest, res);
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}
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}
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public static void Psetp(EmitterContext context)
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{
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InstPsetp op = context.GetOp<InstPsetp>();
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Operand srcA = context.BitwiseNot(Register(op.Src2Pred, RegisterType.Predicate), op.Src2PredInv);
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Operand srcB = context.BitwiseNot(Register(op.Src1Pred, RegisterType.Predicate), op.Src1PredInv);
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Operand p0Res = GetPredLogicalOp(context, op.BoolOpAB, srcA, srcB);
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Operand p1Res = context.BitwiseNot(p0Res);
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Operand srcPred = GetPredicate(context, op.SrcPred, op.SrcPredInv);
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p0Res = GetPredLogicalOp(context, op.BoolOpC, p0Res, srcPred);
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p1Res = GetPredLogicalOp(context, op.BoolOpC, p1Res, srcPred);
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context.Copy(Register(op.DestPred, RegisterType.Predicate), p0Res);
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context.Copy(Register(op.DestPredInv, RegisterType.Predicate), p1Res);
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}
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}
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}
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