forked from Mirror/Ryujinx
Partial support for branch with CC, and fix a edge case of branch out of loop on shaders
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parent
99f236fcf0
commit
442485adb3
5 changed files with 60 additions and 14 deletions
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@ -4,12 +4,16 @@ namespace Ryujinx.Graphics.Shader.Decoders
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{
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class OpCodeBranch : OpCode
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{
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public Condition Condition { get; }
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public int Offset { get; }
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public bool PushTarget { get; protected set; }
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public OpCodeBranch(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
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{
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Condition = (Condition)(opCode & 0x1f);
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Offset = ((int)(opCode >> 20) << 8) >> 8;
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PushTarget = false;
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@ -288,7 +288,9 @@ namespace Ryujinx.Graphics.Shader.Instructions
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context.Copy(dest, res);
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}
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// TODO: CC, X
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SetZnFlags(context, res, op.SetCondCode, op.Extended);
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// TODO: X
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}
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public static void Isetp(EmitterContext context)
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@ -4,6 +4,7 @@ using Ryujinx.Graphics.Shader.Translation;
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using System.Collections.Generic;
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using System.Linq;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Instructions
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@ -129,22 +130,29 @@ namespace Ryujinx.Graphics.Shader.Instructions
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private static void EmitBranch(EmitterContext context, ulong address)
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{
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OpCode op = context.CurrOp;
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// If we're branching to the next instruction, then the branch
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// is useless and we can ignore it.
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if (address == context.CurrOp.Address + 8)
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if (address == op.Address + 8)
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{
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return;
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}
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Operand label = context.GetLabel(address);
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Operand pred = Register(context.CurrOp.Predicate);
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Operand pred = Register(op.Predicate);
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if (context.CurrOp.Predicate.IsPT)
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if (op is OpCodeBranch opBranch && opBranch.Condition != Condition.Always)
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{
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pred = context.BitwiseAnd(pred, GetCondition(context, opBranch.Condition));
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}
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if (op.Predicate.IsPT)
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{
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context.Branch(label);
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}
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else if (context.CurrOp.InvertPredicate)
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else if (op.InvertPredicate)
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{
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context.BranchIfFalse(label, pred);
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}
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@ -153,5 +161,21 @@ namespace Ryujinx.Graphics.Shader.Instructions
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context.BranchIfTrue(label, pred);
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}
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}
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private static Operand GetCondition(EmitterContext context, Condition cond)
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{
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// TODO: More condition codes, figure out how they work.
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switch (cond)
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{
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case Condition.Equal:
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case Condition.EqualUnordered:
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return GetZF(context);
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case Condition.NotEqual:
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case Condition.NotEqualUnordered:
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return context.BitwiseNot(GetZF(context));
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}
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return Const(IrConsts.True);
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}
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}
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}
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@ -11,7 +11,7 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
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{
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private HashSet<BasicBlock> _loopTails;
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private Stack<(AstBlock Block, int EndIndex)> _blockStack;
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private Stack<(AstBlock Block, int CurrEndIndex, int LoopEndIndex)> _blockStack;
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private Dictionary<Operand, AstOperand> _localsMap;
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@ -22,6 +22,7 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
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private AstBlock _currBlock;
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private int _currEndIndex;
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private int _loopEndIndex;
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public StructuredProgramInfo Info { get; }
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@ -31,7 +32,7 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
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{
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_loopTails = new HashSet<BasicBlock>();
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_blockStack = new Stack<(AstBlock, int)>();
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_blockStack = new Stack<(AstBlock, int, int)>();
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_localsMap = new Dictionary<Operand, AstOperand>();
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@ -42,6 +43,7 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
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_currBlock = new AstBlock(AstBlockType.Main);
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_currEndIndex = blocksCount;
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_loopEndIndex = blocksCount;
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Info = new StructuredProgramInfo(_currBlock);
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@ -52,7 +54,7 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
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{
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while (_currEndIndex == block.Index)
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{
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(_currBlock, _currEndIndex) = _blockStack.Pop();
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(_currBlock, _currEndIndex, _loopEndIndex) = _blockStack.Pop();
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}
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if (_gotoTempAsgs.TryGetValue(block.Index, out AstAssignment gotoTempAsg))
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@ -107,9 +109,19 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
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return;
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}
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// We can only enclose the "if" when the branch lands before
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// the end of the current block. If the current enclosing block
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// is not a loop, then we can also do so if the branch lands
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// right at the end of the current block. When it is a loop,
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// this is not valid as the loop condition would be evaluated,
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// and it could erroneously jump back to the start of the loop.
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bool inRange =
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block.Branch.Index < _currEndIndex ||
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(block.Branch.Index == _currEndIndex && block.Branch.Index < _loopEndIndex);
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bool isLoop = block.Branch.Index <= block.Index;
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if (block.Branch.Index <= _currEndIndex && !isLoop)
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if (inRange && !isLoop)
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{
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NewBlock(AstBlockType.If, branchOp, block.Branch.Index);
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}
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@ -171,10 +183,15 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
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AddNode(childBlock);
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_blockStack.Push((_currBlock, _currEndIndex));
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_blockStack.Push((_currBlock, _currEndIndex, _loopEndIndex));
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_currBlock = childBlock;
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_currEndIndex = endIndex;
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if (type == AstBlockType.DoWhile)
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{
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_loopEndIndex = endIndex;
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}
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}
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private IAstNode GetBranchCond(AstBlockType type, Operation branchOp)
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@ -1,6 +1,5 @@
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using Ryujinx.Graphics.Shader.CodeGen.Glsl;
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using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.Instructions;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.StructuredIr;
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using Ryujinx.Graphics.Shader.Translation.Optimizations;
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@ -219,15 +218,15 @@ namespace Ryujinx.Graphics.Shader.Translation
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Operand predSkipLbl = null;
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bool skipPredicateCheck = op.Emitter == InstEmit.Bra;
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bool skipPredicateCheck = op is OpCodeBranch opBranch && !opBranch.PushTarget;
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if (op is OpCodeBranchPop opBranchPop)
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{
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// If the instruction is a SYNC instruction with only one
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// If the instruction is a SYNC or BRK instruction with only one
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// possible target address, then the instruction is basically
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// just a simple branch, we can generate code similar to branch
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// instructions, with the condition check on the branch itself.
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skipPredicateCheck |= opBranchPop.Targets.Count < 2;
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skipPredicateCheck = opBranchPop.Targets.Count < 2;
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}
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if (!(op.Predicate.IsPT || skipPredicateCheck))
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