forked from Mirror/Ryujinx
Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store
This commit is contained in:
parent
e174100474
commit
950011c90f
20 changed files with 217 additions and 93 deletions
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@ -28,14 +28,14 @@ namespace ChocolArm64
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private object ExecuteLock;
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public AThread(AMemory Memory, ThreadPriority Priority, long EntryPoint)
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public AThread(ATranslator Translator, AMemory Memory, ThreadPriority Priority, long EntryPoint)
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{
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this.Translator = Translator;
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this.Memory = Memory;
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this.Priority = Priority;
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this.EntryPoint = EntryPoint;
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ThreadState = new AThreadState();
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Translator = new ATranslator(this);
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ExecuteLock = new object();
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}
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@ -55,7 +55,7 @@ namespace ChocolArm64
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Work = new Thread(delegate()
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{
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Translator.ExecuteSubroutine(EntryPoint);
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Translator.ExecuteSubroutine(this, EntryPoint);
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Memory.RemoveMonitor(ThreadId);
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@ -1,47 +1,70 @@
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using ChocolArm64.Decoder;
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using ChocolArm64.Events;
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using ChocolArm64.Instruction;
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using ChocolArm64.Memory;
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using ChocolArm64.Translation;
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using System;
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using System.Collections.Concurrent;
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using System.Collections.Generic;
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using System.Reflection.Emit;
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namespace ChocolArm64
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{
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class ATranslator
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public class ATranslator
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{
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public AThread Thread { get; private set; }
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private ConcurrentDictionary<long, ATranslatedSub> CachedSubs;
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private Dictionary<long, ATranslatedSub> CachedSubs;
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private ConcurrentDictionary<long, string> SymbolTable;
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public event EventHandler<ACpuTraceEventArgs> CpuTrace;
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public bool EnableCpuTrace { get; set; }
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private bool KeepRunning;
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public ATranslator(AThread Parent)
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public ATranslator(IReadOnlyDictionary<long, string> SymbolTable = null)
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{
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this.Thread = Parent;
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CachedSubs = new ConcurrentDictionary<long, ATranslatedSub>();
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CachedSubs = new Dictionary<long, ATranslatedSub>();
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if (SymbolTable != null)
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{
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this.SymbolTable = new ConcurrentDictionary<long, string>(SymbolTable);
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}
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else
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{
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this.SymbolTable = new ConcurrentDictionary<long, string>();
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}
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KeepRunning = true;
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}
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public void StopExecution() => KeepRunning = false;
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public void ExecuteSubroutine(long Position)
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public void ExecuteSubroutine(AThread Thread, long Position)
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{
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do
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{
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if (CachedSubs.TryGetValue(Position, out ATranslatedSub Sub) && !Sub.NeedsReJit)
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if (EnableCpuTrace)
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{
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if (!SymbolTable.TryGetValue(Position, out string SubName))
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{
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SubName = string.Empty;
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}
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CpuTrace?.Invoke(this, new ACpuTraceEventArgs(Position, SubName));
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}
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if (!CachedSubs.TryGetValue(Position, out ATranslatedSub Sub) || Sub.NeedsReJit)
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{
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Sub = TranslateSubroutine(Thread.Memory, Position);
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}
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Position = Sub.Execute(Thread.ThreadState, Thread.Memory);
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}
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else
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{
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Position = TranslateSubroutine(Position).Execute(Thread.ThreadState, Thread.Memory);
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}
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}
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while (Position != 0 && KeepRunning);
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}
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public bool TryGetCachedSub(AOpCode OpCode, out ATranslatedSub Sub)
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internal bool TryGetCachedSub(AOpCode OpCode, out ATranslatedSub Sub)
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{
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if (OpCode.Emitter != AInstEmit.Bl)
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{
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@ -53,24 +76,29 @@ namespace ChocolArm64
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return TryGetCachedSub(((AOpCodeBImmAl)OpCode).Imm, out Sub);
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}
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public bool TryGetCachedSub(long Position, out ATranslatedSub Sub)
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internal bool TryGetCachedSub(long Position, out ATranslatedSub Sub)
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{
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return CachedSubs.TryGetValue(Position, out Sub);
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}
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public bool HasCachedSub(long Position)
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internal bool HasCachedSub(long Position)
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{
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return CachedSubs.ContainsKey(Position);
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}
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private ATranslatedSub TranslateSubroutine(long Position)
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private ATranslatedSub TranslateSubroutine(AMemory Memory, long Position)
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{
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(ABlock[] Graph, ABlock Root) Cfg = ADecoder.DecodeSubroutine(this, Position);
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(ABlock[] Graph, ABlock Root) Cfg = ADecoder.DecodeSubroutine(this, Memory, Position);
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string SubName = SymbolTable.GetOrAdd(Position, $"Sub{Position:x16}");
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PropagateName(Cfg.Graph, SubName);
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AILEmitterCtx Context = new AILEmitterCtx(
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this,
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Cfg.Graph,
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Cfg.Root);
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Cfg.Root,
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SubName);
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if (Context.CurrBlock.Position != Position)
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{
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@ -95,12 +123,24 @@ namespace ChocolArm64
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ATranslatedSub Subroutine = Context.GetSubroutine();
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if (!CachedSubs.TryAdd(Position, Subroutine))
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{
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CachedSubs[Position] = Subroutine;
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}
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CachedSubs.AddOrUpdate(Position, Subroutine, (Key, OldVal) => Subroutine);
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return Subroutine;
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}
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private void PropagateName(ABlock[] Graph, string Name)
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{
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foreach (ABlock Block in Graph)
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{
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AOpCode LastOp = Block.GetLastOp();
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if (LastOp != null &&
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(LastOp.Emitter == AInstEmit.Bl ||
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LastOp.Emitter == AInstEmit.Blr))
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{
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SymbolTable.TryAdd(LastOp.Position + 4, Name);
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}
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}
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}
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}
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}
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@ -18,7 +18,10 @@ namespace ChocolArm64.Decoder
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OpActivators = new ConcurrentDictionary<Type, OpActivator>();
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}
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public static (ABlock[] Graph, ABlock Root) DecodeSubroutine(ATranslator Translator, long Start)
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public static (ABlock[] Graph, ABlock Root) DecodeSubroutine(
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ATranslator Translator,
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AMemory Memory,
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long Start)
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{
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Dictionary<long, ABlock> Visited = new Dictionary<long, ABlock>();
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Dictionary<long, ABlock> VisitedEnd = new Dictionary<long, ABlock>();
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@ -45,7 +48,7 @@ namespace ChocolArm64.Decoder
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{
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ABlock Current = Blocks.Dequeue();
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FillBlock(Translator.Thread.Memory, Current);
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FillBlock(Memory, Current);
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//Set child blocks. "Branch" is the block the branch instruction
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//points to (when taken), "Next" is the block at the next address,
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17
ChocolArm64/Events/ACpuTraceEventArgs.cs
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17
ChocolArm64/Events/ACpuTraceEventArgs.cs
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using System;
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namespace ChocolArm64.Events
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{
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public class ACpuTraceEventArgs : EventArgs
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{
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public long Position { get; private set; }
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public string SubName { get; private set; }
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public ACpuTraceEventArgs(long Position, string SubName)
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{
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this.Position = Position;
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this.SubName = SubName;
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}
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}
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}
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14
ChocolArm64/Events/AInstExceptionEventArgs.cs
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14
ChocolArm64/Events/AInstExceptionEventArgs.cs
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@ -0,0 +1,14 @@
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using System;
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namespace ChocolArm64.Events
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{
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public class AInstExceptionEventArgs : EventArgs
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{
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public int Id { get; private set; }
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public AInstExceptionEventArgs(int Id)
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{
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this.Id = Id;
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}
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}
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}
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@ -1,13 +1,13 @@
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using System;
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namespace ChocolArm64.State
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namespace ChocolArm64.Events
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{
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public class AInstUndEventArgs : EventArgs
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public class AInstUndefinedEventArgs : EventArgs
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{
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public long Position { get; private set; }
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public int RawOpCode { get; private set; }
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public AInstUndEventArgs(long Position, int RawOpCode)
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public AInstUndefinedEventArgs(long Position, int RawOpCode)
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{
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this.Position = Position;
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this.RawOpCode = RawOpCode;
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@ -44,16 +44,15 @@ namespace ChocolArm64.Instruction
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Context.Emit(OpCodes.Neg);
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}
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Context.EmitStintzr(Op.Rd);
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Context.Emit(OpCodes.Br_S, LblEnd);
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Context.MarkLabel(LblTrue);
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Context.EmitLdintzr(Op.Rn);
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Context.EmitStintzr(Op.Rd);
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Context.MarkLabel(LblEnd);
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Context.EmitStintzr(Op.Rd);
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}
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}
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}
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@ -1,14 +0,0 @@
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using System;
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namespace ChocolArm64.State
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{
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public class AInstExceptEventArgs : EventArgs
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{
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public int Id { get; private set; }
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public AInstExceptEventArgs(int Id)
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{
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this.Id = Id;
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}
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}
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}
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@ -1,3 +1,4 @@
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using ChocolArm64.Events;
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using System;
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namespace ChocolArm64.State
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@ -42,23 +43,23 @@ namespace ChocolArm64.State
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public long CntpctEl0 => Environment.TickCount * TicksPerMS;
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public event EventHandler<AInstExceptEventArgs> Break;
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public event EventHandler<AInstExceptEventArgs> SvcCall;
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public event EventHandler<AInstUndEventArgs> Undefined;
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public event EventHandler<AInstExceptionEventArgs> Break;
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public event EventHandler<AInstExceptionEventArgs> SvcCall;
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public event EventHandler<AInstUndefinedEventArgs> Undefined;
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internal void OnBreak(int Imm)
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{
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Break?.Invoke(this, new AInstExceptEventArgs(Imm));
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Break?.Invoke(this, new AInstExceptionEventArgs(Imm));
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}
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internal void OnSvcCall(int Imm)
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{
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SvcCall?.Invoke(this, new AInstExceptEventArgs(Imm));
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SvcCall?.Invoke(this, new AInstExceptionEventArgs(Imm));
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}
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internal void OnUndefined(long Position, int RawOpCode)
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{
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Undefined?.Invoke(this, new AInstUndEventArgs(Position, RawOpCode));
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Undefined?.Invoke(this, new AInstUndefinedEventArgs(Position, RawOpCode));
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}
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}
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}
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7
ChocolArm64/Translation/AILBarrier.cs
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7
ChocolArm64/Translation/AILBarrier.cs
Normal file
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@ -0,0 +1,7 @@
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namespace ChocolArm64.Translation
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{
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struct AILBarrier : IAILEmit
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{
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public void Emit(AILEmitter Context) { }
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}
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}
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@ -6,9 +6,11 @@ namespace ChocolArm64.Translation
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{
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public long IntInputs { get; private set; }
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public long IntOutputs { get; private set; }
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public long IntAwOutputs { get; private set; }
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public long VecInputs { get; private set; }
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public long VecOutputs { get; private set; }
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public long VecAwOutputs { get; private set; }
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public bool HasStateStore { get; private set; }
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@ -24,13 +26,22 @@ namespace ChocolArm64.Translation
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public void Add(IAILEmit ILEmitter)
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{
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if (ILEmitter is AILOpCodeLoad Ld && AILEmitter.IsRegIndex(Ld.Index))
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if (ILEmitter is AILBarrier)
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{
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//Those barriers are used to separate the groups of CIL
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//opcodes emitted by each ARM instruction.
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//We can only consider the new outputs for doing input elimination
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//after all the CIL opcodes used by the instruction being emitted.
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IntAwOutputs = IntOutputs;
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VecAwOutputs = VecOutputs;
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}
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else if (ILEmitter is AILOpCodeLoad Ld && AILEmitter.IsRegIndex(Ld.Index))
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{
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switch (Ld.IoType)
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{
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case AIoType.Flag: IntInputs |= ((1L << Ld.Index) << 32) & ~IntOutputs; break;
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case AIoType.Int: IntInputs |= (1L << Ld.Index) & ~IntOutputs; break;
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case AIoType.Vector: VecInputs |= (1L << Ld.Index) & ~VecOutputs; break;
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case AIoType.Flag: IntInputs |= ((1L << Ld.Index) << 32) & ~IntAwOutputs; break;
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case AIoType.Int: IntInputs |= (1L << Ld.Index) & ~IntAwOutputs; break;
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case AIoType.Vector: VecInputs |= (1L << Ld.Index) & ~VecAwOutputs; break;
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}
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}
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else if (ILEmitter is AILOpCodeStore St)
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@ -39,14 +39,16 @@ namespace ChocolArm64.Translation
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private const int Tmp4Index = -4;
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private const int Tmp5Index = -5;
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public AILEmitterCtx(ATranslator Translator, ABlock[] Graph, ABlock Root)
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public AILEmitterCtx(
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ATranslator Translator,
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ABlock[] Graph,
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ABlock Root,
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string SubName)
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{
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this.Translator = Translator;
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this.Graph = Graph;
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this.Root = Root;
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string SubName = $"Sub{Root.Position:X16}";
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Labels = new Dictionary<long, AILLabel>();
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Emitter = new AILEmitter(Graph, Root, SubName);
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@ -92,6 +94,8 @@ namespace ChocolArm64.Translation
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}
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CurrOp.Emitter(this);
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ILBlock.Add(new AILBarrier());
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}
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public bool TryOptEmitSubroutineCall()
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@ -11,12 +11,10 @@ namespace ChocolArm64.Translation
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public ARegisterSize RegisterSize { get; private set; }
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public AILOpCodeLoad(int Index, AIoType IoType) : this(Index, IoType, ARegisterSize.Int64) { }
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public AILOpCodeLoad(int Index, AIoType IoType, ARegisterSize RegisterSize)
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public AILOpCodeLoad(int Index, AIoType IoType, ARegisterSize RegisterSize = 0)
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{
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this.IoType = IoType;
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this.Index = Index;
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this.IoType = IoType;
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this.RegisterSize = RegisterSize;
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}
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|
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@ -11,10 +11,10 @@ namespace ChocolArm64.Translation
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public ARegisterSize RegisterSize { get; private set; }
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public AILOpCodeStore(int Index, AIoType IoType, ARegisterSize RegisterSize = ARegisterSize.Int64)
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public AILOpCodeStore(int Index, AIoType IoType, ARegisterSize RegisterSize = 0)
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{
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this.IoType = IoType;
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this.Index = Index;
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this.IoType = IoType;
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this.RegisterSize = RegisterSize;
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}
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|
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|
@ -67,7 +67,7 @@ namespace ChocolArm64.Translation
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public long VecOutputs;
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}
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private const int MaxOptGraphLength = 120;
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private const int MaxOptGraphLength = 55;
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public ALocalAlloc(AILBlock[] Graph, AILBlock Root)
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{
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|
@ -150,10 +150,6 @@ namespace ChocolArm64.Translation
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if (RetTarget)
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{
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BlkIO.Entry = Block;
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BlkIO.IntInputs = 0;
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BlkIO.VecInputs = 0;
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BlkIO.IntOutputs = 0;
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BlkIO.VecOutputs = 0;
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}
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else
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{
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|
|
|
@ -17,7 +17,6 @@ namespace Ryujinx.Core.Loaders
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Binding == ElfSymBinding.STB_WEAK;
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||||
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public int SHIdx { get; private set; }
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public long ValueAbs { get; private set; }
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public long Value { get; private set; }
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public long Size { get; private set; }
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|
@ -26,7 +25,6 @@ namespace Ryujinx.Core.Loaders
|
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int Info,
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int Other,
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int SHIdx,
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long ImageBase,
|
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long Value,
|
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long Size)
|
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{
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|
@ -35,7 +33,6 @@ namespace Ryujinx.Core.Loaders
|
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this.Binding = (ElfSymBinding)(Info >> 4);
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this.Visibility = (ElfSymVisibility)Other;
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this.SHIdx = SHIdx;
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this.ValueAbs = Value + ImageBase;
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this.Value = Value;
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this.Size = Size;
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}
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|
|
|
@ -9,13 +9,21 @@ namespace Ryujinx.Core.Loaders
|
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{
|
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private AMemory Memory;
|
||||
|
||||
private ElfDyn[] Dynamic;
|
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private List<ElfDyn> Dynamic;
|
||||
|
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private Dictionary<long, string> m_SymbolTable;
|
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|
||||
public IReadOnlyDictionary<long, string> SymbolTable => m_SymbolTable;
|
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|
||||
public long ImageBase { get; private set; }
|
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public long ImageEnd { get; private set; }
|
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|
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public Executable(IExecutable Exe, AMemory Memory, long ImageBase)
|
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{
|
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Dynamic = new List<ElfDyn>();
|
||||
|
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m_SymbolTable = new Dictionary<long, string>();
|
||||
|
||||
this.Memory = Memory;
|
||||
this.ImageBase = ImageBase;
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this.ImageEnd = ImageBase;
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@ -48,9 +56,7 @@ namespace Ryujinx.Core.Loaders
|
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|
||||
MapBss(BssStartOffset, BssEndOffset - BssStartOffset);
|
||||
|
||||
ImageEnd = BssEndOffset;
|
||||
|
||||
List<ElfDyn> Dynamic = new List<ElfDyn>();
|
||||
ImageEnd = ImageBase + BssEndOffset;
|
||||
|
||||
while (true)
|
||||
{
|
||||
|
@ -69,7 +75,19 @@ namespace Ryujinx.Core.Loaders
|
|||
Dynamic.Add(new ElfDyn(Tag, Value));
|
||||
}
|
||||
|
||||
this.Dynamic = Dynamic.ToArray();
|
||||
long StrTblAddr = ImageBase + GetFirstValue(ElfDynTag.DT_STRTAB);
|
||||
long SymTblAddr = ImageBase + GetFirstValue(ElfDynTag.DT_SYMTAB);
|
||||
|
||||
long SymEntSize = GetFirstValue(ElfDynTag.DT_SYMENT);
|
||||
|
||||
while ((ulong)SymTblAddr < (ulong)StrTblAddr)
|
||||
{
|
||||
ElfSym Sym = GetSymbol(SymTblAddr, StrTblAddr);
|
||||
|
||||
m_SymbolTable.TryAdd(Sym.Value, Sym.Name);
|
||||
|
||||
SymTblAddr += SymEntSize;
|
||||
}
|
||||
}
|
||||
|
||||
private void WriteData(
|
||||
|
@ -135,7 +153,7 @@ namespace Ryujinx.Core.Loaders
|
|||
Name += (char)Chr;
|
||||
}
|
||||
|
||||
return new ElfSym(Name, Info, Other, SHIdx, ImageBase, Value, Size);
|
||||
return new ElfSym(Name, Info, Other, SHIdx, Value, Size);
|
||||
}
|
||||
|
||||
private long GetFirstValue(ElfDynTag Tag)
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
using ChocolArm64;
|
||||
using ChocolArm64.Events;
|
||||
using ChocolArm64.Memory;
|
||||
using ChocolArm64.State;
|
||||
using Ryujinx.Core.Loaders;
|
||||
using Ryujinx.Core.Loaders.Executables;
|
||||
using Ryujinx.Core.OsHle.Exceptions;
|
||||
|
@ -24,6 +24,8 @@ namespace Ryujinx.Core.OsHle
|
|||
|
||||
private Switch Ns;
|
||||
|
||||
private ATranslator Translator;
|
||||
|
||||
public int ProcessId { get; private set; }
|
||||
|
||||
public AMemory Memory { get; private set; }
|
||||
|
@ -171,7 +173,7 @@ namespace Ryujinx.Core.OsHle
|
|||
ThreadPrio = ThreadPriority.Lowest;
|
||||
}
|
||||
|
||||
AThread Thread = new AThread(Memory, ThreadPrio, EntryPoint);
|
||||
AThread Thread = new AThread(GetTranslator(), Memory, ThreadPrio, EntryPoint);
|
||||
|
||||
HThread ThreadHnd = new HThread(Thread, ProcessorId, Priority);
|
||||
|
||||
|
@ -201,16 +203,45 @@ namespace Ryujinx.Core.OsHle
|
|||
return Handle;
|
||||
}
|
||||
|
||||
private void BreakHandler(object sender, AInstExceptEventArgs e)
|
||||
private void BreakHandler(object sender, AInstExceptionEventArgs e)
|
||||
{
|
||||
throw new GuestBrokeExecutionException();
|
||||
}
|
||||
|
||||
private void UndefinedHandler(object sender, AInstUndEventArgs e)
|
||||
private void UndefinedHandler(object sender, AInstUndefinedEventArgs e)
|
||||
{
|
||||
throw new UndefinedInstructionException(e.Position, e.RawOpCode);
|
||||
}
|
||||
|
||||
private ATranslator GetTranslator()
|
||||
{
|
||||
if (Translator == null)
|
||||
{
|
||||
Dictionary<long, string> SymbolTable = new Dictionary<long, string>();
|
||||
|
||||
foreach (Executable Exe in Executables)
|
||||
{
|
||||
foreach (KeyValuePair<long, string> KV in Exe.SymbolTable)
|
||||
{
|
||||
SymbolTable.Add(Exe.ImageBase + KV.Key, KV.Value);
|
||||
}
|
||||
}
|
||||
|
||||
Translator = new ATranslator(SymbolTable);
|
||||
|
||||
|
||||
|
||||
Translator.CpuTrace += CpuTraceHandler;
|
||||
}
|
||||
|
||||
return Translator;
|
||||
}
|
||||
|
||||
private void CpuTraceHandler(object sender, ACpuTraceEventArgs e)
|
||||
{
|
||||
Logging.Info($"Executing at 0x{e.Position:x16} {e.SubName}");
|
||||
}
|
||||
|
||||
private int GetFreeTlsSlot(AThread Thread)
|
||||
{
|
||||
for (int Index = 1; Index < TotalTlsSlots; Index++)
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
using ChocolArm64.Events;
|
||||
using ChocolArm64.Memory;
|
||||
using ChocolArm64.State;
|
||||
using System;
|
||||
|
@ -62,7 +63,7 @@ namespace Ryujinx.Core.OsHle.Svc
|
|||
Rng = new Random();
|
||||
}
|
||||
|
||||
public void SvcCall(object sender, AInstExceptEventArgs e)
|
||||
public void SvcCall(object sender, AInstExceptionEventArgs e)
|
||||
{
|
||||
AThreadState ThreadState = (AThreadState)sender;
|
||||
|
||||
|
|
|
@ -30,10 +30,11 @@ namespace Ryujinx.Tests.Cpu
|
|||
EntryPoint = Position;
|
||||
|
||||
Ram = Marshal.AllocHGlobal((IntPtr)AMemoryMgr.RamSize);
|
||||
ATranslator Translator = new ATranslator();
|
||||
Allocator = new AMemoryAlloc();
|
||||
Memory = new AMemory(Ram, Allocator);
|
||||
Memory.Manager.MapPhys(Position, Size, 2, AMemoryPerm.Read | AMemoryPerm.Write | AMemoryPerm.Execute);
|
||||
Thread = new AThread(Memory, ThreadPriority.Normal, EntryPoint);
|
||||
Thread = new AThread(Translator, Memory, ThreadPriority.Normal, EntryPoint);
|
||||
}
|
||||
|
||||
[TearDown]
|
||||
|
|
Reference in a new issue