forked from Mirror/Ryujinx
Revert Apple hypervisor force ordered memory change (#6068)
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2 changed files with 0 additions and 74 deletions
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@ -1,62 +0,0 @@
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using System;
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using System.Runtime.InteropServices;
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using System.Runtime.Intrinsics;
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namespace Ryujinx.Cpu.AppleHv
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{
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static class HvCodePatcher
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{
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private const uint XMask = 0x3f808000u;
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private const uint XValue = 0x8000000u;
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private const uint ZrIndex = 31u;
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public static void RewriteUnorderedExclusiveInstructions(Span<byte> code)
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{
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Span<uint> codeUint = MemoryMarshal.Cast<byte, uint>(code);
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Span<Vector128<uint>> codeVector = MemoryMarshal.Cast<byte, Vector128<uint>>(code);
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Vector128<uint> mask = Vector128.Create(XMask);
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Vector128<uint> value = Vector128.Create(XValue);
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for (int index = 0; index < codeVector.Length; index++)
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{
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Vector128<uint> v = codeVector[index];
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if (Vector128.EqualsAny(Vector128.BitwiseAnd(v, mask), value))
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{
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int baseIndex = index * 4;
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for (int instIndex = baseIndex; instIndex < baseIndex + 4; instIndex++)
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{
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ref uint inst = ref codeUint[instIndex];
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if ((inst & XMask) != XValue)
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{
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continue;
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}
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bool isPair = (inst & (1u << 21)) != 0;
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bool isLoad = (inst & (1u << 22)) != 0;
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uint rt2 = (inst >> 10) & 0x1fu;
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uint rs = (inst >> 16) & 0x1fu;
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if (isLoad && rs != ZrIndex)
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{
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continue;
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}
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if (!isPair && rt2 != ZrIndex)
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{
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continue;
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}
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// Set the ordered flag.
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inst |= 1u << 15;
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}
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}
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}
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}
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}
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}
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@ -724,18 +724,6 @@ namespace Ryujinx.Cpu.AppleHv
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/// <inheritdoc/>
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public void Reprotect(ulong va, ulong size, MemoryPermission protection)
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{
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if (protection.HasFlag(MemoryPermission.Execute))
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{
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// Some applications use unordered exclusive memory access instructions
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// where it is not valid to do so, leading to memory re-ordering that
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// makes the code behave incorrectly on some CPUs.
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// To work around this, we force all such accesses to be ordered.
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using WritableRegion writableRegion = GetWritableRegion(va, (int)size);
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HvCodePatcher.RewriteUnorderedExclusiveInstructions(writableRegion.Memory.Span);
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}
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// TODO
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}
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