alexx009/jinx
Archived
1
0
Fork 0
forked from Mirror/Ryujinx
Code Pull requests Activity

Fix kernel VA allocation when random allocation fails (#3755)

Browse source 
* Fix kernel VA allocation when random allocation fails

* This was off by one
This commit is contained in:
gdkchan 2022-10-17 19:12:49 -03:00 committed by GitHub
parent 2aeb5b00e3
commit f5a1de6ac5
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
1 changed files with 9 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

18
Ryujinx.HLE/HOS/Kernel/Memory/KPageTableBase.cs
View file

@ -2540,11 +2540,10 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
for (int attempt = 0; attempt < 8; attempt++)
{
address = BitUtils.AlignDown(regionStart + GetRandomValue(0, aslrMaxOffset) * (ulong)alignment, alignment);
ulong aslrAddress = BitUtils.AlignDown(regionStart + GetRandomValue(0, aslrMaxOffset) * (ulong)alignment, alignment);
ulong aslrEndAddr = aslrAddress + totalNeededSize;
ulong endAddr = address + totalNeededSize;
KMemoryInfo info = _blockManager.FindBlock(address).GetInfo();
KMemoryInfo info = _blockManager.FindBlock(aslrAddress).GetInfo();
if (info.State != MemoryState.Unmapped)
{
@ -2554,11 +2553,12 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
ulong currBaseAddr = info.Address + reservedPagesCount * PageSize;
ulong currEndAddr = info.Address + info.Size;
if (address >= regionStart &&
address >= currBaseAddr &&
endAddr - 1 <= regionEndAddr - 1 &&
endAddr - 1 <= currEndAddr - 1)
if (aslrAddress >= regionStart &&
aslrAddress >= currBaseAddr &&
aslrEndAddr - 1 <= regionEndAddr - 1 &&
aslrEndAddr - 1 <= currEndAddr - 1)
{
address = aslrAddress;
break;
}
}
@ -2603,7 +2603,7 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
ulong totalNeededSize = reservedSize + neededPagesCount * PageSize;
ulong regionEndAddr = regionStart + regionPagesCount * PageSize;
ulong regionEndAddr = (regionStart + regionPagesCount * PageSize) - 1;
KMemoryBlock currBlock = _blockManager.FindBlock(regionStart);