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9 commits

Author SHA1 Message Date
LDj3SNuD
7cda630aba Add Sqxtn_S, Sqxtn_V, Uqxtn_S, Uqxtn_V instructions and Tests (6). (#110)
* Update ILGeneratorEx.cs

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update CpuTest.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdArithmetic.cs
2018-04-29 20:39:58 -03:00
gdkchan
bd9b1e2c6b Stub a few services, add support for generating call stacks on the CPU 2018-04-22 01:22:46 -03:00
gdkchan
9227b0ea59 [CPU] Speed up translation a little bit 2018-04-11 14:44:03 -03:00
gdkchan
0ac4681fa0 Fix 32-bits extended register instructions with 64-bits extensions 2018-03-30 23:32:06 -03:00
gdkchan
e922c3627a Rename IpcServices -> Services 2018-03-20 17:00:00 -03:00
gdkchan
3edb66f389
Improve CPU initial translation speeds (#50)
* Add background translation to the CPU

* Do not use a separate thread for translation, implement 2 tiers translation

* Remove unnecessary usings

* Lower MinCallCountForReJit

* Remove unused variable
2018-03-04 14:09:59 -03:00
gdkchan
950011c90f Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store 2018-02-25 22:14:58 -03:00
gdkchan
035efc913e Fix cpu issue with cmp optimization, add HINT and FRINTX (scalar) instructions, fix for NvFlinger sometimes missing free buffers 2018-02-24 11:19:28 -03:00
emmauss
62b827f474 Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00