forked from Mirror/Ryujinx
0b52ee6627
* Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics, some CQ improvements * Remove useless space * Address PR feedback * Revert EmitVectorZero32_128 changes |
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.. | ||
Decoder | ||
Decoder32 | ||
Events | ||
Exceptions | ||
Instruction | ||
Instruction32 | ||
Memory | ||
State | ||
Translation | ||
ABitUtils.cs | ||
AOpCodeTable.cs | ||
AOptimizations.cs | ||
AThread.cs | ||
ATranslatedSub.cs | ||
ATranslatedSubType.cs | ||
ATranslator.cs | ||
ATranslatorCache.cs | ||
ChocolArm64.csproj |