Archived
1
0
Fork 0
forked from Mirror/Ryujinx
This repository has been archived on 2024-10-11. You can view files and clone it, but cannot push or open issues or pull requests.
jinx/ChocolArm64/Instruction
2018-04-22 02:48:17 -03:00
..
AInst.cs Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00
AInstEmitAlu.cs Add Cls Instruction. (#67) 2018-03-23 22:06:05 -03:00
AInstEmitAluHelper.cs Fix corner cases of ADCS and SBFM 2018-02-26 15:56:34 -03:00
AInstEmitBfm.cs Fix corner cases of ADCS and SBFM 2018-02-26 15:56:34 -03:00
AInstEmitCcmp.cs Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00
AInstEmitCsel.cs Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store 2018-02-25 22:14:58 -03:00
AInstEmitException.cs Print guest stack trace on a few points that can throw exceptions 2018-04-22 02:48:17 -03:00
AInstEmitFlow.cs Stub a few services, add support for generating call stacks on the CPU 2018-04-22 01:22:46 -03:00
AInstEmitHash.cs Remove unused function from CPU 2018-03-14 00:57:07 -03:00
AInstEmitMemory.cs Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00
AInstEmitMemoryEx.cs Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00
AInstEmitMemoryHelper.cs Allow to enable/disable memory checks even on release mode through the flag, return error for invalid addresses on SvcMap*Memory svcs, do not return error on SvcQueryMemory (instead, return reserved for the end of the address space), other minor tweaks 2018-03-10 20:39:16 -03:00
AInstEmitMove.cs Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00
AInstEmitMul.cs Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00
AInstEmitSimdArithmetic.cs Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92) 2018-04-20 12:40:15 -03:00
AInstEmitSimdCmp.cs Fix FRSQRTS and FCM* (scalar) instructions 2018-04-06 10:20:17 -03:00
AInstEmitSimdCvt.cs Add MUL (vector by element), fix FCVTN, make svcs use MakeError too 2018-03-05 16:18:37 -03:00
AInstEmitSimdHelper.cs Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & vector) instructions. Add 5 simple tests. (#74) 2018-04-08 16:08:57 -03:00
AInstEmitSimdLogical.cs Add BIT instruction 2018-03-30 16:46:00 -03:00
AInstEmitSimdMemory.cs Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00
AInstEmitSimdMove.cs Add TRN1 & TRN2 (vector) instructions. Add 4 simple tests (4S, 8B). (#77) 2018-04-12 11:52:00 -03:00
AInstEmitSimdShift.cs CPU fix for the cases using a Mask with shift = 0 2018-03-14 01:59:22 -03:00
AInstEmitSystem.cs Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count 2018-03-13 21:24:32 -03:00
AInstEmitter.cs Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00
ASoftFallback.cs Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89) 2018-04-19 00:22:12 -03:00
ASoftFloat.cs Implement Frsqrte_S (#72) 2018-04-05 20:36:19 -03:00