forked from Mirror/Ryujinx
a731ab3a2a
* Start of the ARMeilleure project * Refactoring around the old IRAdapter, now renamed to PreAllocator * Optimize the LowestBitSet method * Add CLZ support and fix CLS implementation * Add missing Equals and GetHashCode overrides on some structs, misc small tweaks * Implement the ByteSwap IR instruction, and some refactoring on the assembler * Implement the DivideUI IR instruction and fix 64-bits IDIV * Correct constant operand type on CSINC * Move division instructions implementation to InstEmitDiv * Fix destination type for the ConditionalSelect IR instruction * Implement UMULH and SMULH, with new IR instructions * Fix some issues with shift instructions * Fix constant types for BFM instructions * Fix up new tests using the new V128 struct * Update tests * Move DIV tests to a separate file * Add support for calls, and some instructions that depends on them * Start adding support for SIMD & FP types, along with some of the related ARM instructions * Fix some typos and the divide instruction with FP operands * Fix wrong method call on Clz_V * Implement ARM FP & SIMD move instructions, Saddlv_V, and misc. fixes * Implement SIMD logical instructions and more misc. fixes * Fix PSRAD x86 instruction encoding, TRN, UABD and UABDL implementations * Implement float conversion instruction, merge in LDj3SNuD fixes, and some other misc. fixes * Implement SIMD shift instruction and fix Dup_V * Add SCVTF and UCVTF (vector, fixed-point) variants to the opcode table * Fix check with tolerance on tester * Implement FP & SIMD comparison instructions, and some fixes * Update FCVT (Scalar) encoding on the table to support the Half-float variants * Support passing V128 structs, some cleanup on the register allocator, merge LDj3SNuD fixes * Use old memory access methods, made a start on SIMD memory insts support, some fixes * Fix float constant passed to functions, save and restore non-volatile XMM registers, other fixes * Fix arguments count with struct return values, other fixes * More instructions * Misc. fixes and integrate LDj3SNuD fixes * Update tests * Add a faster linear scan allocator, unwinding support on windows, and other changes * Update Ryujinx.HLE * Update Ryujinx.Graphics * Fix V128 return pointer passing, RCX is clobbered * Update Ryujinx.Tests * Update ITimeZoneService * Stop using GetFunctionPointer as that can't be called from native code, misc. fixes and tweaks * Use generic GetFunctionPointerForDelegate method and other tweaks * Some refactoring on the code generator, assert on invalid operations and use a separate enum for intrinsics * Remove some unused code on the assembler * Fix REX.W prefix regression on float conversion instructions, add some sort of profiler * Add hardware capability detection * Fix regression on Sha1h and revert Fcm** changes * Add SSE2-only paths on vector extract and insert, some refactoring on the pre-allocator * Fix silly mistake introduced on last commit on CpuId * Generate inline stack probes when the stack allocation is too large * Initial support for the System-V ABI * Support multiple destination operands * Fix SSE2 VectorInsert8 path, and other fixes * Change placement of XMM callee save and restore code to match other compilers * Rename Dest to Destination and Inst to Instruction * Fix a regression related to calls and the V128 type * Add an extra space on comments to match code style * Some refactoring * Fix vector insert FP32 SSE2 path * Port over the ARM32 instructions * Avoid memory protection races on JIT Cache * Another fix on VectorInsert FP32 (thanks to LDj3SNuD * Float operands don't need to use the same register when VEX is supported * Add a new register allocator, higher quality code for hot code (tier up), and other tweaks * Some nits, small improvements on the pre allocator * CpuThreadState is gone * Allow changing CPU emulators with a config entry * Add runtime identifiers on the ARMeilleure project * Allow switching between CPUs through a config entry (pt. 2) * Change win10-x64 to win-x64 on projects * Update the Ryujinx project to use ARMeilleure * Ensure that the selected register is valid on the hybrid allocator * Allow exiting on returns to 0 (should fix test regression) * Remove register assignments for most used variables on the hybrid allocator * Do not use fixed registers as spill temp * Add missing namespace and remove unneeded using * Address PR feedback * Fix types, etc * Enable AssumeStrictAbiCompliance by default * Ensure that Spill and Fill don't load or store any more than necessary
898 lines
46 KiB
C#
898 lines
46 KiB
C#
#define AluRs
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using NUnit.Framework;
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namespace Ryujinx.Tests.Cpu
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{
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[Category("AluRs")]
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public sealed class CpuTestAluRs : CpuTest
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{
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#if AluRs
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private const int RndCnt = 2;
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private const int RndCntAmount = 2;
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private const int RndCntLsb = 2;
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[Test, Pairwise, Description("ADC <Xd>, <Xn>, <Xm>")]
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public void Adc_64bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
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[Values] bool carryIn)
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{
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uint opcode = 0x9A000000; // ADC X0, X0, X0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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SingleOpcode(opcode, x1: xn, x2: xm, x31: x31, carry: carryIn);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ADC <Wd>, <Wn>, <Wm>")]
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public void Adc_32bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
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[Values] bool carryIn)
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{
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uint opcode = 0x1A000000; // ADC W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, x1: wn, x2: wm, x31: w31, carry: carryIn);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ADCS <Xd>, <Xn>, <Xm>")]
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public void Adcs_64bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
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[Values] bool carryIn)
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{
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uint opcode = 0xBA000000; // ADCS X0, X0, X0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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SingleOpcode(opcode, x1: xn, x2: xm, x31: x31, carry: carryIn);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ADCS <Wd>, <Wn>, <Wm>")]
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public void Adcs_32bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
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[Values] bool carryIn)
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{
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uint opcode = 0x3A000000; // ADCS W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, x1: wn, x2: wm, x31: w31, carry: carryIn);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ADD <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
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public void Add_64bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
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[Values(0b00u, 0b01u, 0b10u)] uint shift, // <LSL, LSR, ASR>
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[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
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{
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uint opcode = 0x8B000000; // ADD X0, X0, X0, LSL #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ADD <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
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public void Add_32bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
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[Values(0b00u, 0b01u, 0b10u)] uint shift, // <LSL, LSR, ASR>
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[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
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{
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uint opcode = 0x0B000000; // ADD W0, W0, W0, LSL #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ADDS <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
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public void Adds_64bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
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[Values(0b00u, 0b01u, 0b10u)] uint shift, // <LSL, LSR, ASR>
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[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
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{
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uint opcode = 0xAB000000; // ADDS X0, X0, X0, LSL #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ADDS <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
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public void Adds_32bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
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[Values(0b00u, 0b01u, 0b10u)] uint shift, // <LSL, LSR, ASR>
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[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
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{
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uint opcode = 0x2B000000; // ADDS W0, W0, W0, LSL #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("AND <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
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public void And_64bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
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[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
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[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
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{
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uint opcode = 0x8A000000; // AND X0, X0, X0, LSL #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("AND <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
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public void And_32bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
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[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
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[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
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{
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uint opcode = 0x0A000000; // AND W0, W0, W0, LSL #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ANDS <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
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public void Ands_64bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
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[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
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[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
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{
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uint opcode = 0xEA000000; // ANDS X0, X0, X0, LSL #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ANDS <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
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public void Ands_32bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
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[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
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[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
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{
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uint opcode = 0x6A000000; // ANDS W0, W0, W0, LSL #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ASRV <Xd>, <Xn>, <Xm>")]
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public void Asrv_64bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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[Values(0ul, 31ul, 32ul, 63ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm)
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{
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uint opcode = 0x9AC02800; // ASRV X0, X0, X0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("ASRV <Wd>, <Wn>, <Wm>")]
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public void Asrv_32bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0u, 15u, 16u, 31u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm)
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{
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uint opcode = 0x1AC02800; // ASRV W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("BIC <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
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public void Bic_64bit([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
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[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
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[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
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{
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uint opcode = 0x8A200000; // BIC X0, X0, X0, LSL #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("BIC <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
|
|
public void Bic_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0x0A200000; // BIC W0, W0, W0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("BICS <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
|
|
public void Bics_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0xEA200000; // BICS X0, X0, X0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("BICS <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
|
|
public void Bics_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0x6A200000; // BICS W0, W0, W0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("EON <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
|
|
public void Eon_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0xCA200000; // EON X0, X0, X0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("EON <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
|
|
public void Eon_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0x4A200000; // EON W0, W0, W0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("EOR <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
|
|
public void Eor_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0xCA000000; // EOR X0, X0, X0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("EOR <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
|
|
public void Eor_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0x4A000000; // EOR W0, W0, W0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("EXTR <Xd>, <Xn>, <Xm>, #<lsb>")]
|
|
public void Extr_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
|
|
[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntLsb)] uint lsb)
|
|
{
|
|
uint opcode = 0x93C00000; // EXTR X0, X0, X0, #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((lsb & 63) << 10);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("EXTR <Wd>, <Wn>, <Wm>, #<lsb>")]
|
|
public void Extr_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntLsb)] uint lsb)
|
|
{
|
|
uint opcode = 0x13800000; // EXTR W0, W0, W0, #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((lsb & 63) << 10);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("LSLV <Xd>, <Xn>, <Xm>")]
|
|
public void Lslv_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0ul, 31ul, 32ul, 63ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm)
|
|
{
|
|
uint opcode = 0x9AC02000; // LSLV X0, X0, X0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("LSLV <Wd>, <Wn>, <Wm>")]
|
|
public void Lslv_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0u, 15u, 16u, 31u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm)
|
|
{
|
|
uint opcode = 0x1AC02000; // LSLV W0, W0, W0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("LSRV <Xd>, <Xn>, <Xm>")]
|
|
public void Lsrv_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0ul, 31ul, 32ul, 63ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm)
|
|
{
|
|
uint opcode = 0x9AC02400; // LSRV X0, X0, X0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("LSRV <Wd>, <Wn>, <Wm>")]
|
|
public void Lsrv_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0u, 15u, 16u, 31u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm)
|
|
{
|
|
uint opcode = 0x1AC02400; // LSRV W0, W0, W0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("ORN <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
|
|
public void Orn_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0xAA200000; // ORN X0, X0, X0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("ORN <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
|
|
public void Orn_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0x2A200000; // ORN W0, W0, W0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("ORR <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
|
|
public void Orr_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0xAA000000; // ORR X0, X0, X0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("ORR <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
|
|
public void Orr_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
|
[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0x2A000000; // ORR W0, W0, W0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("RORV <Xd>, <Xn>, <Xm>")]
|
|
public void Rorv_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0ul, 31ul, 32ul, 63ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm)
|
|
{
|
|
uint opcode = 0x9AC02C00; // RORV X0, X0, X0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("RORV <Wd>, <Wn>, <Wm>")]
|
|
public void Rorv_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0u, 15u, 16u, 31u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm)
|
|
{
|
|
uint opcode = 0x1AC02C00; // RORV W0, W0, W0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("SBC <Xd>, <Xn>, <Xm>")]
|
|
public void Sbc_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
|
|
[Values] bool carryIn)
|
|
{
|
|
uint opcode = 0xDA000000; // SBC X0, X0, X0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31, carry: carryIn);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("SBC <Wd>, <Wn>, <Wm>")]
|
|
public void Sbc_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values] bool carryIn)
|
|
{
|
|
uint opcode = 0x5A000000; // SBC W0, W0, W0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31, carry: carryIn);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("SBCS <Xd>, <Xn>, <Xm>")]
|
|
public void Sbcs_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
|
|
[Values] bool carryIn)
|
|
{
|
|
uint opcode = 0xFA000000; // SBCS X0, X0, X0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31, carry: carryIn);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("SBCS <Wd>, <Wn>, <Wm>")]
|
|
public void Sbcs_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values] bool carryIn)
|
|
{
|
|
uint opcode = 0x7A000000; // SBCS W0, W0, W0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31, carry: carryIn);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("SUB <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
|
|
public void Sub_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
|
|
[Values(0b00u, 0b01u, 0b10u)] uint shift, // <LSL, LSR, ASR>
|
|
[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0xCB000000; // SUB X0, X0, X0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("SUB <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
|
|
public void Sub_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values(0b00u, 0b01u, 0b10u)] uint shift, // <LSL, LSR, ASR>
|
|
[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0x4B000000; // SUB W0, W0, W0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("SUBS <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")]
|
|
public void Subs_64bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
|
|
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
|
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm,
|
|
[Values(0b00u, 0b01u, 0b10u)] uint shift, // <LSL, LSR, ASR>
|
|
[Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0xEB000000; // SUBS X0, X0, X0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
|
|
[Test, Pairwise, Description("SUBS <Wd>, <Wn>, <Wm>{, <shift> #<amount>}")]
|
|
public void Subs_32bit([Values(0u, 31u)] uint rd,
|
|
[Values(1u, 31u)] uint rn,
|
|
[Values(2u, 31u)] uint rm,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
|
|
[Values(0x00000000u, 0x7FFFFFFFu,
|
|
0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
|
|
[Values(0b00u, 0b01u, 0b10u)] uint shift, // <LSL, LSR, ASR>
|
|
[Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, RndCntAmount)] uint amount)
|
|
{
|
|
uint opcode = 0x6B000000; // SUBS W0, W0, W0, LSL #0
|
|
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
|
opcode |= ((shift & 3) << 22) | ((amount & 63) << 10);
|
|
|
|
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
|
|
|
CompareAgainstUnicorn();
|
|
}
|
|
#endif
|
|
}
|
|
}
|