forked from Mirror/Ryujinx
6b23a2c125
* Start implementing a new shader translator * Fix shift instructions and a typo * Small refactoring on StructuredProgram, move RemovePhis method to a separate class * Initial geometry shader support * Implement TLD4 * Fix -- There's no negation on FMUL32I * Add constant folding and algebraic simplification optimizations, nits * Some leftovers from constant folding * Avoid cast for constant assignments * Add a branch elimination pass, and misc small fixes * Remove redundant branches, add expression propagation and other improvements on the code * Small leftovers -- add missing break and continue, remove unused properties, other improvements * Add null check to handle empty block cases on block visitor * Add HADD2 and HMUL2 half float shader instructions * Optimize pack/unpack sequences, some fixes related to half float instructions * Add TXQ, TLD, TLDS and TLD4S shader texture instructions, and some support for bindless textures, some refactoring on codegen * Fix copy paste mistake that caused RZ to be ignored on the AST instruction * Add workaround for conditional exit, and fix half float instruction with constant buffer * Add missing 0.0 source for TLDS.LZ variants * Simplify the switch for TLDS.LZ * Texture instructions related fixes * Implement the HFMA instruction, and some misc. fixes * Enable constant folding on UnpackHalf2x16 instructions * Refactor HFMA to use OpCode* for opcode decoding rather than on the helper methods * Remove the old shader translator * Remove ShaderDeclInfo and other unused things * Add dual vertex shader support * Add ShaderConfig, used to pass shader type and maximum cbuffer size * Move and rename some instruction enums * Move texture instructions into a separate file * Move operand GetExpression and locals management to OperandManager * Optimize opcode decoding using a simple list and binary search * Add missing condition for do-while on goto elimination * Misc. fixes on texture instructions * Simplify TLDS switch * Address PR feedback, and a nit
61 lines
No EOL
1.9 KiB
C#
61 lines
No EOL
1.9 KiB
C#
using Ryujinx.Graphics.Shader.Instructions;
|
|
|
|
namespace Ryujinx.Graphics.Shader.Decoders
|
|
{
|
|
class OpCodeTextureScalar : OpCode
|
|
{
|
|
#region "Component mask LUT"
|
|
private const int ____ = 0x0;
|
|
private const int R___ = 0x1;
|
|
private const int _G__ = 0x2;
|
|
private const int RG__ = 0x3;
|
|
private const int __B_ = 0x4;
|
|
private const int RGB_ = 0x7;
|
|
private const int ___A = 0x8;
|
|
private const int R__A = 0x9;
|
|
private const int _G_A = 0xa;
|
|
private const int RG_A = 0xb;
|
|
private const int __BA = 0xc;
|
|
private const int R_BA = 0xd;
|
|
private const int _GBA = 0xe;
|
|
private const int RGBA = 0xf;
|
|
|
|
private static int[,] _maskLut = new int[,]
|
|
{
|
|
{ R___, _G__, __B_, ___A, RG__, R__A, _G_A, __BA },
|
|
{ RGB_, RG_A, R_BA, _GBA, RGBA, ____, ____, ____ }
|
|
};
|
|
#endregion
|
|
|
|
public Register Rd0 { get; }
|
|
public Register Ra { get; }
|
|
public Register Rb { get; }
|
|
public Register Rd1 { get; }
|
|
|
|
public int Immediate { get; }
|
|
|
|
public int ComponentMask { get; }
|
|
|
|
protected int RawType;
|
|
|
|
public bool IsFp16 { get; }
|
|
|
|
public OpCodeTextureScalar(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
|
|
{
|
|
Rd0 = new Register(opCode.Extract(0, 8), RegisterType.Gpr);
|
|
Ra = new Register(opCode.Extract(8, 8), RegisterType.Gpr);
|
|
Rb = new Register(opCode.Extract(20, 8), RegisterType.Gpr);
|
|
Rd1 = new Register(opCode.Extract(28, 8), RegisterType.Gpr);
|
|
|
|
Immediate = opCode.Extract(36, 13);
|
|
|
|
int compSel = opCode.Extract(50, 3);
|
|
|
|
RawType = opCode.Extract(53, 4);
|
|
|
|
IsFp16 = !opCode.Extract(59);
|
|
|
|
ComponentMask = _maskLut[Rd1.IsRZ ? 0 : 1, compSel];
|
|
}
|
|
}
|
|
} |