forked from Mirror/Ryujinx
89ccec197e
* Implement VMOVL and VORR.I32 AArch32 SIMD instructions * Rename <dt> to <size> on test description * Rename Widen to Long and improve VMOVL implementation a bit
35 lines
1.1 KiB
C#
35 lines
1.1 KiB
C#
namespace ARMeilleure.Decoders
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{
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class OpCode32SimdImm : OpCode32SimdBase, IOpCode32SimdImm
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{
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public bool Q { get; private set; }
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public long Immediate { get; private set; }
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public int Elems => GetBytesCount() >> Size;
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public OpCode32SimdImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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Vd = (opCode >> 12) & 0xf;
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Vd |= (opCode >> 18) & 0x10;
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Q = ((opCode >> 6) & 0x1) > 0;
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int cMode = (opCode >> 8) & 0xf;
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int op = (opCode >> 5) & 0x1;
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long imm;
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imm = ((uint)opCode >> 0) & 0xf;
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imm |= ((uint)opCode >> 12) & 0x70;
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imm |= ((uint)opCode >> 17) & 0x80;
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(Immediate, Size) = OpCodeSimdHelper.GetSimdImmediateAndSize(cMode, op, imm);
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RegisterSize = Q ? RegisterSize.Simd128 : RegisterSize.Simd64;
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if (DecoderHelper.VectorArgumentsInvalid(Q, Vd))
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{
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Instruction = InstDescriptor.Undefined;
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}
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}
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}
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}
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