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gdkchan c1bdf19061 Implement some ARM32 memory instructions and CMP (#565) ... * Implement ARM32 memory instructions: LDM, LDR, LDRB, LDRD, LDRH, LDRSB, LDRSH, STM, STR, STRB, STRD, STRH (immediate and register + immediate variants), implement CMP (immediate and register shifted by immediate variants) * Rename some opcode classes and flag masks for consistency * Fix a few suboptimal ARM32 codegen issues, only loads should be considered on decoder when checking if Rt == PC, and only NZCV flags should be considered for comparison optimizations * Take into account Rt2 for LDRD instructions aswell when checking if the instruction changes PC * Re-align arm32 instructions on the opcode table		2019-01-29 13:06:11 -03:00
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CryptoHelper.cs	Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)	2019-01-29 10:54:39 -03:00
Inst.cs	Add ARM32 support on the translator (#561)	2019-01-24 23:59:53 -02:00
InstEmit32Helper.cs	Implement some ARM32 memory instructions and CMP (#565)	2019-01-29 13:06:11 -03:00
InstEmitAlu.cs	Add ARM32 support on the translator (#561)	2019-01-24 23:59:53 -02:00
InstEmitAlu32.cs	Implement some ARM32 memory instructions and CMP (#565)	2019-01-29 13:06:11 -03:00
InstEmitAluHelper.cs	Implement some ARM32 memory instructions and CMP (#565)	2019-01-29 13:06:11 -03:00
InstEmitBfm.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
InstEmitCcmp.cs	Add ARM32 support on the translator (#561)	2019-01-24 23:59:53 -02:00
InstEmitCsel.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
InstEmitException.cs	Misc. CPU improvements (#519)	2018-12-10 22:58:52 -02:00
InstEmitFlow.cs	Add ARM32 support on the translator (#561)	2019-01-24 23:59:53 -02:00
InstEmitFlow32.cs	Implement some ARM32 memory instructions and CMP (#565)	2019-01-29 13:06:11 -03:00
InstEmitFlowHelper.cs	Add ARM32 support on the translator (#561)	2019-01-24 23:59:53 -02:00
InstEmitHash.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
InstEmitMemory.cs	Misc. CPU improvements (#519)	2018-12-10 22:58:52 -02:00
InstEmitMemory32.cs	Implement some ARM32 memory instructions and CMP (#565)	2019-01-29 13:06:11 -03:00
InstEmitMemoryEx.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
InstEmitMemoryHelper.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
InstEmitMove.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
InstEmitMul.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
InstEmitSimdArithmetic.cs	Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)	2019-01-29 10:54:39 -03:00
InstEmitSimdCmp.cs	Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)	2019-01-29 10:54:39 -03:00
InstEmitSimdCrypto.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
InstEmitSimdCvt.cs	Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)	2019-01-29 10:54:39 -03:00
InstEmitSimdHash.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
InstEmitSimdHelper.cs	Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)	2019-01-29 10:54:39 -03:00
InstEmitSimdLogical.cs	Fix Sshl_V; Add S/Uqrshl_V, S/Uqshl_V, S/Urshl_V; Add Tests. (#516)	2018-12-01 22:34:43 -02:00
InstEmitSimdMemory.cs	Add ARM32 support on the translator (#561)	2019-01-24 23:59:53 -02:00
InstEmitSimdMove.cs	Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)	2019-01-29 10:54:39 -03:00
InstEmitSimdShift.cs	Fix Frecpe_S/V and Frsqrte_S/V (full FP emu.). Add Sse Opt. & SoftFloat Impl. for Fcmeq/ge/gt/le/lt_S/V (Reg & Zero), Faddp_S/V, Fmaxp_V, Fminp_V Inst.; add Sse Opt. for Shll_V, S/Ushll_V Inst.; improve Sse Opt. for Xtn_V Inst.. Add Tests. (#543)	2018-12-26 15:11:36 -02:00
InstEmitSystem.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
InstEmitter.cs	Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)	2018-10-30 22:43:02 -03:00
SoftFallback.cs	Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)	2019-01-29 10:54:39 -03:00
SoftFloat.cs	Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)	2019-01-29 10:54:39 -03:00
VectorHelper.cs	Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. (#496)	2018-11-18 00:41:16 -02:00