forked from Mirror/Ryujinx
Implement UHADD8 instruction (#2908)
* Implement UHADD8 instruction along with a test unit * Update PTC revision number
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5 changed files with 40 additions and 1 deletions
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@ -776,6 +776,7 @@ namespace ARMeilleure.Decoders
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SetA32("<<<<00010001xxxx0000xxxx0xx1xxxx", InstName.Tst, InstEmit32.Tst, OpCode32AluRsReg.Create);
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SetA32("<<<<00010001xxxx0000xxxx0xx1xxxx", InstName.Tst, InstEmit32.Tst, OpCode32AluRsReg.Create);
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SetA32("<<<<0111111xxxxxxxxxxxxxx101xxxx", InstName.Ubfx, InstEmit32.Ubfx, OpCode32AluBf.Create);
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SetA32("<<<<0111111xxxxxxxxxxxxxx101xxxx", InstName.Ubfx, InstEmit32.Ubfx, OpCode32AluBf.Create);
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SetA32("<<<<01110011xxxx1111xxxx0001xxxx", InstName.Udiv, InstEmit32.Udiv, OpCode32AluMla.Create);
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SetA32("<<<<01110011xxxx1111xxxx0001xxxx", InstName.Udiv, InstEmit32.Udiv, OpCode32AluMla.Create);
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SetA32("<<<<01100111xxxxxxxx11111001xxxx", InstName.Uhadd8, InstEmit32.Uhadd8, OpCode32AluReg.Create);
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SetA32("<<<<00000100xxxxxxxxxxxx1001xxxx", InstName.Umaal, InstEmit32.Umaal, OpCode32AluUmull.Create);
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SetA32("<<<<00000100xxxxxxxxxxxx1001xxxx", InstName.Umaal, InstEmit32.Umaal, OpCode32AluUmull.Create);
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SetA32("<<<<0000101xxxxxxxxxxxxx1001xxxx", InstName.Umlal, InstEmit32.Umlal, OpCode32AluUmull.Create);
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SetA32("<<<<0000101xxxxxxxxxxxxx1001xxxx", InstName.Umlal, InstEmit32.Umlal, OpCode32AluUmull.Create);
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SetA32("<<<<0000100xxxxxxxxxxxxx1001xxxx", InstName.Umull, InstEmit32.Umull, OpCode32AluUmull.Create);
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SetA32("<<<<0000100xxxxxxxxxxxxx1001xxxx", InstName.Umull, InstEmit32.Umull, OpCode32AluUmull.Create);
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@ -472,6 +472,24 @@ namespace ARMeilleure.Instructions
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EmitDiv(context, true);
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EmitDiv(context, true);
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}
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}
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public static void Uhadd8(ArmEmitterContext context)
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{
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OpCode32AluReg op = (OpCode32AluReg)context.CurrOp;
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Operand m = GetIntA32(context, op.Rm);
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Operand n = GetIntA32(context, op.Rn);
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Operand xor, res;
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res = context.BitwiseAnd(m, n);
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xor = context.BitwiseExclusiveOr(m, n);
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xor = context.ShiftRightUI(xor, Const(1));
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xor = context.BitwiseAnd(xor, Const(0x7F7F7F7Fu));
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res = context.Add(res, xor);
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SetIntA32(context, op.Rd, res);
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}
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public static void Usat(ArmEmitterContext context)
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public static void Usat(ArmEmitterContext context)
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{
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{
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OpCode32Sat op = (OpCode32Sat)context.CurrOp;
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OpCode32Sat op = (OpCode32Sat)context.CurrOp;
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@ -541,6 +541,7 @@ namespace ARMeilleure.Instructions
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Trap,
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Trap,
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Tst,
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Tst,
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Ubfx,
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Ubfx,
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Uhadd8,
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Umaal,
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Umaal,
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Umlal,
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Umlal,
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Umull,
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Umull,
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@ -27,7 +27,7 @@ namespace ARMeilleure.Translation.PTC
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private const string OuterHeaderMagicString = "PTCohd\0\0";
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private const string OuterHeaderMagicString = "PTCohd\0\0";
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private const string InnerHeaderMagicString = "PTCihd\0\0";
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private const string InnerHeaderMagicString = "PTCihd\0\0";
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private const uint InternalVersion = 2721; //! To be incremented manually for each change to the ARMeilleure project.
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private const uint InternalVersion = 2908; //! To be incremented manually for each change to the ARMeilleure project.
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private const string ActualDir = "0";
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private const string ActualDir = "0";
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private const string BackupDir = "1";
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private const string BackupDir = "1";
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@ -111,6 +111,25 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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CompareAgainstUnicorn();
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}
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}
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[Test, Pairwise]
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public void Uhadd8([Values(0u, 0xdu)] uint rd,
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[Values(1u)] uint rm,
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[Values(2u)] uint rn,
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[Random(RndCnt)] uint w0,
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[Random(RndCnt)] uint w1,
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[Random(RndCnt)] uint w2)
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{
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uint opcode = 0xE6700F90u; //UHADD8 R0, R0, R0
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opcode |= ((rm & 15) << 0) | ((rd & 15) << 12) | ((rn & 15) << 16);
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uint sp = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, r0: w0, r1: w1, r2: w2, sp: sp);
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CompareAgainstUnicorn();
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}
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#endif
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#endif
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}
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}
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}
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}
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