forked from Mirror/Ryujinx
Add support for the FMLA (by element/scalar) instruction (#187)
* Add support for the FMLA (by element/scalar) instruction * Fix encoding
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3 changed files with 17 additions and 0 deletions
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@ -271,6 +271,7 @@ namespace ChocolArm64
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SetA64("000111100x1xxxxx010110xxxxxxxxxx", AInstEmit.Fmin_S, typeof(AOpCodeSimdReg));
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SetA64("0x0011101x1xxxxx111101xxxxxxxxxx", AInstEmit.Fmin_V, typeof(AOpCodeSimdReg));
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SetA64("000111100x1xxxxx011110xxxxxxxxxx", AInstEmit.Fminnm_S, typeof(AOpCodeSimdReg));
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SetA64("010111111<<xxxxx0001x0xxxxxxxxxx", AInstEmit.Fmla_Se, typeof(AOpCodeSimdRegElemF));
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SetA64("0>0011100<1xxxxx110011xxxxxxxxxx", AInstEmit.Fmla_V, typeof(AOpCodeSimdReg));
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SetA64("0x0011111<<xxxxx0001x0xxxxxxxxxx", AInstEmit.Fmla_Ve, typeof(AOpCodeSimdRegElemF));
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SetA64("0>0011101<1xxxxx110011xxxxxxxxxx", AInstEmit.Fmls_V, typeof(AOpCodeSimdReg));
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@ -516,6 +516,15 @@ namespace ChocolArm64.Instruction
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Fmin_S(Context);
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}
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public static void Fmla_Se(AILEmitterCtx Context)
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{
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EmitScalarTernaryOpByElemF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Fmla_V(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpF(Context, () =>
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@ -260,6 +260,13 @@ namespace ChocolArm64.Instruction
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EmitScalarOpByElemF(Context, Emit, Op.Index, Ternary: false);
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}
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public static void EmitScalarTernaryOpByElemF(AILEmitterCtx Context, Action Emit)
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{
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AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
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EmitScalarOpByElemF(Context, Emit, Op.Index, Ternary: true);
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}
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public static void EmitScalarOpByElemF(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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