forked from Mirror/Ryujinx
43ebd7a9bb
* New shader cache implementation * Remove some debug code * Take transform feedback varying count into account * Create shader cache directory if it does not exist + fragment output map related fixes * Remove debug code * Only check texture descriptors if the constant buffer is bound * Also check CPU VA on GetSpanMapped * Remove more unused code and move cache related code * XML docs + remove more unused methods * Better codegen for TransformFeedbackDescriptor.AsSpan * Support migration from old cache format, remove more unused code Shader cache rebuild now also rewrites the shared toc and data files * Fix migration error with BRX shaders * Add a limit to the async translation queue Avoid async translation threads not being able to keep up and the queue growing very large * Re-create specialization state on recompile This might be required if a new version of the shader translator requires more or less state, or if there is a bug related to the GPU state access * Make shader cache more error resilient * Add some missing XML docs and move GpuAccessor docs to the interface/use inheritdoc * Address early PR feedback * Fix rebase * Remove IRenderer.CompileShader and IShader interface, replace with new ShaderSource struct passed to CreateProgram directly * Handle some missing exceptions * Make shader cache purge delete both old and new shader caches * Register textures on new specialization state * Translate and compile shaders in forward order (eliminates diffs due to different binding numbers) * Limit in-flight shader compilation to the maximum number of compilation threads * Replace ParallelDiskCacheLoader state changed event with a callback function * Better handling for invalid constant buffer 1 data length * Do not create the old cache directory structure if the old cache does not exist * Constant buffer use should be per-stage. This change will invalidate existing new caches (file format version was incremented) * Replace rectangle texture with just coordinate normalization * Skip incompatible shaders that are missing texture information, instead of crashing This is required if we, for example, support new texture instruction to the shader translator, and then they allow access to textures that were not accessed before. In this scenario, the old cache entry is no longer usable * Fix coordinates normalization on cubemap textures * Check if title ID is null before combining shader cache path * More robust constant buffer address validation on spec state * More robust constant buffer address validation on spec state (2) * Regenerate shader cache with one stream, rather than one per shader. * Only create shader cache directory during initialization * Logging improvements * Proper shader program disposal * PR feedback, and add a comment on serialized structs * XML docs for RegisterTexture Co-authored-by: riperiperi <rhy3756547@hotmail.com>
736 lines
No EOL
26 KiB
C#
736 lines
No EOL
26 KiB
C#
using Ryujinx.Graphics.Shader.Translation;
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using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Runtime.CompilerServices;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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static class Decoder
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{
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public static DecodedProgram Decode(ShaderConfig config, ulong startAddress)
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{
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Queue<DecodedFunction> functionsQueue = new Queue<DecodedFunction>();
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Dictionary<ulong, DecodedFunction> functionsVisited = new Dictionary<ulong, DecodedFunction>();
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DecodedFunction EnqueueFunction(ulong address)
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{
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if (!functionsVisited.TryGetValue(address, out DecodedFunction function))
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{
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functionsVisited.Add(address, function = new DecodedFunction(address));
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functionsQueue.Enqueue(function);
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}
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return function;
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}
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DecodedFunction mainFunction = EnqueueFunction(0);
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while (functionsQueue.TryDequeue(out DecodedFunction currentFunction))
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{
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List<Block> blocks = new List<Block>();
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Queue<Block> workQueue = new Queue<Block>();
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Dictionary<ulong, Block> visited = new Dictionary<ulong, Block>();
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Block GetBlock(ulong blkAddress)
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{
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if (!visited.TryGetValue(blkAddress, out Block block))
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{
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block = new Block(blkAddress);
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workQueue.Enqueue(block);
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visited.Add(blkAddress, block);
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}
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return block;
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}
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GetBlock(currentFunction.Address);
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bool hasNewTarget;
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do
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{
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while (workQueue.TryDequeue(out Block currBlock))
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{
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// Check if the current block is inside another block.
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if (BinarySearch(blocks, currBlock.Address, out int nBlkIndex))
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{
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Block nBlock = blocks[nBlkIndex];
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if (nBlock.Address == currBlock.Address)
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{
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throw new InvalidOperationException("Found duplicate block address on the list.");
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}
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nBlock.Split(currBlock);
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blocks.Insert(nBlkIndex + 1, currBlock);
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continue;
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}
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// If we have a block after the current one, set the limit address.
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ulong limitAddress = ulong.MaxValue;
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if (nBlkIndex != blocks.Count)
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{
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Block nBlock = blocks[nBlkIndex];
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int nextIndex = nBlkIndex + 1;
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if (nBlock.Address < currBlock.Address && nextIndex < blocks.Count)
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{
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limitAddress = blocks[nextIndex].Address;
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}
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else if (nBlock.Address > currBlock.Address)
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{
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limitAddress = blocks[nBlkIndex].Address;
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}
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}
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FillBlock(config, currBlock, limitAddress, startAddress);
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if (currBlock.OpCodes.Count != 0)
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{
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// We should have blocks for all possible branch targets,
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// including those from PBK/PCNT/SSY instructions.
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foreach (PushOpInfo pushOp in currBlock.PushOpCodes)
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{
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GetBlock(pushOp.Op.GetAbsoluteAddress());
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}
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// Set child blocks. "Branch" is the block the branch instruction
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// points to (when taken), "Next" is the block at the next address,
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// executed when the branch is not taken. For Unconditional Branches
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// or end of program, Next is null.
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InstOp lastOp = currBlock.GetLastOp();
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if (lastOp.Name == InstName.Cal)
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{
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EnqueueFunction(lastOp.GetAbsoluteAddress()).AddCaller(currentFunction);
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}
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else if (lastOp.Name == InstName.Bra)
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{
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Block succBlock = GetBlock(lastOp.GetAbsoluteAddress());
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currBlock.Successors.Add(succBlock);
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succBlock.Predecessors.Add(currBlock);
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}
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if (!IsUnconditionalBranch(ref lastOp))
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{
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Block succBlock = GetBlock(currBlock.EndAddress);
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currBlock.Successors.Insert(0, succBlock);
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succBlock.Predecessors.Add(currBlock);
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}
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}
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// Insert the new block on the list (sorted by address).
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if (blocks.Count != 0)
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{
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Block nBlock = blocks[nBlkIndex];
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blocks.Insert(nBlkIndex + (nBlock.Address < currBlock.Address ? 1 : 0), currBlock);
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}
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else
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{
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blocks.Add(currBlock);
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}
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}
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// Propagate SSY/PBK addresses into their uses (SYNC/BRK).
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foreach (Block block in blocks.Where(x => x.PushOpCodes.Count != 0))
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{
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for (int pushOpIndex = 0; pushOpIndex < block.PushOpCodes.Count; pushOpIndex++)
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{
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PropagatePushOp(visited, block, pushOpIndex);
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}
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}
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// Try to find targets for BRX (indirect branch) instructions.
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hasNewTarget = FindBrxTargets(config, blocks, GetBlock);
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// If we discovered new branch targets from the BRX instruction,
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// we need another round of decoding to decode the new blocks.
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// Additionally, we may have more SSY/PBK targets to propagate,
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// and new BRX instructions.
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}
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while (hasNewTarget);
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currentFunction.SetBlocks(blocks.ToArray());
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}
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return new DecodedProgram(mainFunction, functionsVisited);
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}
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private static bool BinarySearch(List<Block> blocks, ulong address, out int index)
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{
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index = 0;
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int left = 0;
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int right = blocks.Count - 1;
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while (left <= right)
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{
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int size = right - left;
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int middle = left + (size >> 1);
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Block block = blocks[middle];
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index = middle;
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if (address >= block.Address && address < block.EndAddress)
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{
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return true;
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}
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if (address < block.Address)
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{
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right = middle - 1;
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}
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else
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{
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left = middle + 1;
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}
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}
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return false;
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}
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private static void FillBlock(ShaderConfig config, Block block, ulong limitAddress, ulong startAddress)
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{
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IGpuAccessor gpuAccessor = config.GpuAccessor;
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ulong address = block.Address;
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int bufferOffset = 0;
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ReadOnlySpan<ulong> buffer = ReadOnlySpan<ulong>.Empty;
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InstOp op = default;
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do
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{
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if (address + 7 >= limitAddress)
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{
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break;
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}
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// Ignore scheduling instructions, which are written every 32 bytes.
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if ((address & 0x1f) == 0)
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{
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address += 8;
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bufferOffset++;
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continue;
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}
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if (bufferOffset >= buffer.Length)
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{
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buffer = gpuAccessor.GetCode(startAddress + address, 8);
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bufferOffset = 0;
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}
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ulong opCode = buffer[bufferOffset++];
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op = InstTable.GetOp(address, opCode);
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if (op.Props.HasFlag(InstProps.TexB))
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{
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config.SetUsedFeature(FeatureFlags.Bindless);
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}
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if (op.Name == InstName.Ald || op.Name == InstName.Ast || op.Name == InstName.Ipa)
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{
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SetUserAttributeUses(config, op.Name, opCode);
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}
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else if (op.Name == InstName.Pbk || op.Name == InstName.Pcnt || op.Name == InstName.Ssy)
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{
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block.AddPushOp(op);
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}
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block.OpCodes.Add(op);
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address += 8;
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}
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while (!op.Props.HasFlag(InstProps.Bra));
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block.EndAddress = address;
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}
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private static void SetUserAttributeUses(ShaderConfig config, InstName name, ulong opCode)
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{
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int offset;
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int count = 1;
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bool isStore = false;
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bool indexed = false;
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bool perPatch = false;
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if (name == InstName.Ast)
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{
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InstAst opAst = new InstAst(opCode);
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count = (int)opAst.AlSize + 1;
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offset = opAst.Imm11;
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indexed = opAst.Phys;
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perPatch = opAst.P;
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isStore = true;
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}
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else if (name == InstName.Ald)
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{
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InstAld opAld = new InstAld(opCode);
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count = (int)opAld.AlSize + 1;
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offset = opAld.Imm11;
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indexed = opAld.Phys;
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perPatch = opAld.P;
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isStore = opAld.O;
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}
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else /* if (name == InstName.Ipa) */
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{
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InstIpa opIpa = new InstIpa(opCode);
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offset = opIpa.Imm10;
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indexed = opIpa.Idx;
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}
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if (indexed)
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{
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if (isStore)
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{
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config.SetAllOutputUserAttributes();
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}
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else
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{
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config.SetAllInputUserAttributes();
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}
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}
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else
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{
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for (int elemIndex = 0; elemIndex < count; elemIndex++)
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{
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int attr = offset + elemIndex * 4;
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if (attr >= AttributeConsts.UserAttributeBase && attr < AttributeConsts.UserAttributeEnd)
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{
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int userAttr = attr - AttributeConsts.UserAttributeBase;
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int index = userAttr / 16;
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if (isStore)
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{
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config.SetOutputUserAttribute(index, perPatch);
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}
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else
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{
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config.SetInputUserAttribute(index, (userAttr >> 2) & 3, perPatch);
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}
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}
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if (!isStore &&
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((attr >= AttributeConsts.FrontColorDiffuseR && attr < AttributeConsts.ClipDistance0) ||
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(attr >= AttributeConsts.TexCoordBase && attr < AttributeConsts.TexCoordEnd)))
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{
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config.SetUsedFeature(FeatureFlags.FixedFuncAttr);
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}
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}
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}
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}
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public static bool IsUnconditionalBranch(ref InstOp op)
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{
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return IsUnconditional(ref op) && op.Props.HasFlag(InstProps.Bra);
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}
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private static bool IsUnconditional(ref InstOp op)
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{
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InstConditional condOp = new InstConditional(op.RawOpCode);
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if (op.Name == InstName.Exit && condOp.Ccc != Ccc.T)
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{
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return false;
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}
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return condOp.Pred == RegisterConsts.PredicateTrueIndex && !condOp.PredInv;
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}
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private static bool FindBrxTargets(ShaderConfig config, IEnumerable<Block> blocks, Func<ulong, Block> getBlock)
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{
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bool hasNewTarget = false;
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foreach (Block block in blocks)
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{
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InstOp lastOp = block.GetLastOp();
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bool hasNext = block.HasNext();
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if (lastOp.Name == InstName.Brx && block.Successors.Count == (hasNext ? 1 : 0))
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{
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InstBrx opBrx = new InstBrx(lastOp.RawOpCode);
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ulong baseOffset = lastOp.GetAbsoluteAddress();
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// An indirect branch could go anywhere,
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// try to get the possible target offsets from the constant buffer.
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(int cbBaseOffset, int cbOffsetsCount) = FindBrxTargetRange(block, opBrx.SrcA);
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if (cbOffsetsCount != 0)
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{
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hasNewTarget = true;
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}
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for (int i = 0; i < cbOffsetsCount; i++)
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{
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uint targetOffset = config.ConstantBuffer1Read(cbBaseOffset + i * 4);
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Block target = getBlock(baseOffset + targetOffset);
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target.Predecessors.Add(block);
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block.Successors.Add(target);
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}
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}
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}
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return hasNewTarget;
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}
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private static (int, int) FindBrxTargetRange(Block block, int brxReg)
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{
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// Try to match the following pattern:
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//
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// IMNMX.U32 Rx, Rx, UpperBound, PT
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// SHL Rx, Rx, 0x2
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// LDC Rx, c[0x1][Rx+BaseOffset]
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//
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// Here, Rx is an arbitrary register, "UpperBound" and "BaseOffset" are constants.
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// The above pattern is assumed to be generated by the compiler before BRX,
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// as the instruction is usually used to implement jump tables for switch statement optimizations.
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// On a successful match, "BaseOffset" is the offset in bytes where the jump offsets are
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// located on the constant buffer, and "UpperBound" is the total number of offsets for the BRX, minus 1.
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HashSet<Block> visited = new HashSet<Block>();
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var ldcLocation = FindFirstRegWrite(visited, new BlockLocation(block, block.OpCodes.Count - 1), brxReg);
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if (ldcLocation.Block == null || ldcLocation.Block.OpCodes[ldcLocation.Index].Name != InstName.Ldc)
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{
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return (0, 0);
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}
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GetOp<InstLdc>(ldcLocation, out var opLdc);
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if (opLdc.CbufSlot != 1 || opLdc.AddressMode != 0)
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{
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return (0, 0);
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}
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var shlLocation = FindFirstRegWrite(visited, ldcLocation, opLdc.SrcA);
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if (shlLocation.Block == null || !shlLocation.IsImmInst(InstName.Shl))
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{
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return (0, 0);
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}
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GetOp<InstShlI>(shlLocation, out var opShl);
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if (opShl.Imm20 != 2)
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{
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return (0, 0);
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}
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var imnmxLocation = FindFirstRegWrite(visited, shlLocation, opShl.SrcA);
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if (imnmxLocation.Block == null || !imnmxLocation.IsImmInst(InstName.Imnmx))
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{
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return (0, 0);
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}
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GetOp<InstImnmxI>(imnmxLocation, out var opImnmx);
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if (opImnmx.Signed || opImnmx.SrcPred != RegisterConsts.PredicateTrueIndex || opImnmx.SrcPredInv)
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{
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return (0, 0);
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}
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return (opLdc.CbufOffset, opImnmx.Imm20 + 1);
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}
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private static void GetOp<T>(BlockLocation location, out T op) where T : unmanaged
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{
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ulong rawOp = location.Block.OpCodes[location.Index].RawOpCode;
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op = Unsafe.As<ulong, T>(ref rawOp);
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}
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private struct BlockLocation
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{
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public Block Block { get; }
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public int Index { get; }
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public BlockLocation(Block block, int index)
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{
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Block = block;
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Index = index;
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}
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public bool IsImmInst(InstName name)
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{
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InstOp op = Block.OpCodes[Index];
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return op.Name == name && op.Props.HasFlag(InstProps.Ib);
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}
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}
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private static BlockLocation FindFirstRegWrite(HashSet<Block> visited, BlockLocation location, int regIndex)
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{
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Queue<BlockLocation> toVisit = new Queue<BlockLocation>();
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toVisit.Enqueue(location);
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visited.Add(location.Block);
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while (toVisit.TryDequeue(out var currentLocation))
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{
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Block block = currentLocation.Block;
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for (int i = currentLocation.Index - 1; i >= 0; i--)
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{
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if (WritesToRegister(block.OpCodes[i], regIndex))
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{
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return new BlockLocation(block, i);
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}
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}
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foreach (Block predecessor in block.Predecessors)
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{
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if (visited.Add(predecessor))
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{
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toVisit.Enqueue(new BlockLocation(predecessor, predecessor.OpCodes.Count));
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}
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}
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}
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return new BlockLocation(null, 0);
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}
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private static bool WritesToRegister(InstOp op, int regIndex)
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{
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// Predicate instruction only ever writes to predicate, so we shouldn't check those.
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if ((op.Props & (InstProps.Rd | InstProps.Rd2)) == 0)
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{
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return false;
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}
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if (op.Props.HasFlag(InstProps.Rd2) && (byte)(op.RawOpCode >> 28) == regIndex)
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{
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return true;
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}
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return (byte)op.RawOpCode == regIndex;
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}
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private enum MergeType
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{
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Brk,
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Cont,
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Sync
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}
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private struct PathBlockState
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{
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public Block Block { get; }
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private enum RestoreType
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{
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None,
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PopPushOp,
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PushBranchOp
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}
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private RestoreType _restoreType;
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private ulong _restoreValue;
|
|
private MergeType _restoreMergeType;
|
|
|
|
public bool ReturningFromVisit => _restoreType != RestoreType.None;
|
|
|
|
public PathBlockState(Block block)
|
|
{
|
|
Block = block;
|
|
_restoreType = RestoreType.None;
|
|
_restoreValue = 0;
|
|
_restoreMergeType = default;
|
|
}
|
|
|
|
public PathBlockState(int oldStackSize)
|
|
{
|
|
Block = null;
|
|
_restoreType = RestoreType.PopPushOp;
|
|
_restoreValue = (ulong)oldStackSize;
|
|
_restoreMergeType = default;
|
|
}
|
|
|
|
public PathBlockState(ulong syncAddress, MergeType mergeType)
|
|
{
|
|
Block = null;
|
|
_restoreType = RestoreType.PushBranchOp;
|
|
_restoreValue = syncAddress;
|
|
_restoreMergeType = mergeType;
|
|
}
|
|
|
|
public void RestoreStackState(Stack<(ulong, MergeType)> branchStack)
|
|
{
|
|
if (_restoreType == RestoreType.PushBranchOp)
|
|
{
|
|
branchStack.Push((_restoreValue, _restoreMergeType));
|
|
}
|
|
else if (_restoreType == RestoreType.PopPushOp)
|
|
{
|
|
while (branchStack.Count > (uint)_restoreValue)
|
|
{
|
|
branchStack.Pop();
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
private static void PropagatePushOp(Dictionary<ulong, Block> blocks, Block currBlock, int pushOpIndex)
|
|
{
|
|
PushOpInfo pushOpInfo = currBlock.PushOpCodes[pushOpIndex];
|
|
InstOp pushOp = pushOpInfo.Op;
|
|
|
|
Block target = blocks[pushOp.GetAbsoluteAddress()];
|
|
|
|
Stack<PathBlockState> workQueue = new Stack<PathBlockState>();
|
|
HashSet<Block> visited = new HashSet<Block>();
|
|
Stack<(ulong, MergeType)> branchStack = new Stack<(ulong, MergeType)>();
|
|
|
|
void Push(PathBlockState pbs)
|
|
{
|
|
// When block is null, this means we are pushing a restore operation.
|
|
// Restore operations are used to undo the work done inside a block
|
|
// when we return from it, for example it pops addresses pushed by
|
|
// SSY/PBK instructions inside the block, and pushes addresses poped
|
|
// by SYNC/BRK.
|
|
// For blocks, if it's already visited, we just ignore to avoid going
|
|
// around in circles and getting stuck here.
|
|
if (pbs.Block == null || !visited.Contains(pbs.Block))
|
|
{
|
|
workQueue.Push(pbs);
|
|
}
|
|
}
|
|
|
|
Push(new PathBlockState(currBlock));
|
|
|
|
while (workQueue.TryPop(out PathBlockState pbs))
|
|
{
|
|
if (pbs.ReturningFromVisit)
|
|
{
|
|
pbs.RestoreStackState(branchStack);
|
|
|
|
continue;
|
|
}
|
|
|
|
Block current = pbs.Block;
|
|
|
|
// If the block was already processed, we just ignore it, otherwise
|
|
// we would push the same child blocks of an already processed block,
|
|
// and go around in circles until memory is exhausted.
|
|
if (!visited.Add(current))
|
|
{
|
|
continue;
|
|
}
|
|
|
|
int pushOpsCount = current.PushOpCodes.Count;
|
|
if (pushOpsCount != 0)
|
|
{
|
|
Push(new PathBlockState(branchStack.Count));
|
|
|
|
for (int index = pushOpIndex; index < pushOpsCount; index++)
|
|
{
|
|
InstOp currentPushOp = current.PushOpCodes[index].Op;
|
|
MergeType pushMergeType = GetMergeTypeFromPush(currentPushOp.Name);
|
|
branchStack.Push((currentPushOp.GetAbsoluteAddress(), pushMergeType));
|
|
}
|
|
}
|
|
|
|
pushOpIndex = 0;
|
|
|
|
bool hasNext = current.HasNext();
|
|
if (hasNext)
|
|
{
|
|
Push(new PathBlockState(current.Successors[0]));
|
|
}
|
|
|
|
InstOp lastOp = current.GetLastOp();
|
|
if (IsPopBranch(lastOp.Name))
|
|
{
|
|
MergeType popMergeType = GetMergeTypeFromPop(lastOp.Name);
|
|
|
|
bool found = true;
|
|
ulong targetAddress = 0UL;
|
|
MergeType mergeType;
|
|
|
|
do
|
|
{
|
|
if (branchStack.Count == 0)
|
|
{
|
|
found = false;
|
|
break;
|
|
}
|
|
|
|
(targetAddress, mergeType) = branchStack.Pop();
|
|
|
|
// Push the target address (this will be used to push the address
|
|
// back into the PBK/PCNT/SSY stack when we return from that block),
|
|
Push(new PathBlockState(targetAddress, mergeType));
|
|
}
|
|
while (mergeType != popMergeType);
|
|
|
|
// Make sure we found the correct address,
|
|
// the push and pop instruction types must match, so:
|
|
// - BRK can only consume addresses pushed by PBK.
|
|
// - SYNC can only consume addresses pushed by SSY.
|
|
if (found)
|
|
{
|
|
if (branchStack.Count == 0)
|
|
{
|
|
// If the entire stack was consumed, then the current pop instruction
|
|
// just consumed the address from our push instruction.
|
|
if (current.SyncTargets.TryAdd(pushOp.Address, new SyncTarget(pushOpInfo, current.SyncTargets.Count)))
|
|
{
|
|
pushOpInfo.Consumers.Add(current, Local());
|
|
target.Predecessors.Add(current);
|
|
current.Successors.Add(target);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
// Push the block itself into the work queue for processing.
|
|
Push(new PathBlockState(blocks[targetAddress]));
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
// By adding them in descending order (sorted by address), we process the blocks
|
|
// in order (of ascending address), since we work with a LIFO.
|
|
foreach (Block possibleTarget in current.Successors.OrderByDescending(x => x.Address))
|
|
{
|
|
if (!hasNext || possibleTarget != current.Successors[0])
|
|
{
|
|
Push(new PathBlockState(possibleTarget));
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
public static bool IsPopBranch(InstName name)
|
|
{
|
|
return name == InstName.Brk || name == InstName.Cont || name == InstName.Sync;
|
|
}
|
|
|
|
private static MergeType GetMergeTypeFromPush(InstName name)
|
|
{
|
|
return name switch
|
|
{
|
|
InstName.Pbk => MergeType.Brk,
|
|
InstName.Pcnt => MergeType.Cont,
|
|
_ => MergeType.Sync
|
|
};
|
|
}
|
|
|
|
private static MergeType GetMergeTypeFromPop(InstName name)
|
|
{
|
|
return name switch
|
|
{
|
|
InstName.Brk => MergeType.Brk,
|
|
InstName.Cont => MergeType.Cont,
|
|
_ => MergeType.Sync
|
|
};
|
|
}
|
|
}
|
|
} |