forked from Mirror/Ryujinx
dc97457bf0
* Implement DADD, DFMA and DMUL shader instructions * Rename FP to FP32 * Correct double immediate * Classic mistake
529 lines
No EOL
18 KiB
C#
529 lines
No EOL
18 KiB
C#
using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.Translation;
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using System;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitAluHelper;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Instructions
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{
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static partial class InstEmit
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{
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public static void Dadd(EmitterContext context) => EmitFPAdd(context, Instruction.FP64);
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public static void Dfma(EmitterContext context) => EmitFPFma(context, Instruction.FP64);
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public static void Dmul(EmitterContext context) => EmitFPMultiply(context, Instruction.FP64);
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public static void Fadd(EmitterContext context) => EmitFPAdd(context, Instruction.FP32);
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public static void Ffma(EmitterContext context) => EmitFPFma(context, Instruction.FP32);
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public static void Ffma32i(EmitterContext context)
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{
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IOpCodeFArith op = (IOpCodeFArith)context.CurrOp;
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bool saturate = op.RawOpCode.Extract(55);
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bool negateA = op.RawOpCode.Extract(56);
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bool negateC = op.RawOpCode.Extract(57);
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Operand srcA = context.FPNegate(GetSrcA(context), negateA);
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Operand srcC = context.FPNegate(GetDest(context), negateC);
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Operand srcB = GetSrcB(context);
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Operand dest = GetDest(context);
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context.Copy(dest, context.FPSaturate(context.FPFusedMultiplyAdd(srcA, srcB, srcC), saturate));
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SetFPZnFlags(context, dest, op.SetCondCode);
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}
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public static void Fmnmx(EmitterContext context)
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{
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IOpCodeFArith op = (IOpCodeFArith)context.CurrOp;
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bool absoluteA = op.AbsoluteA;
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bool negateB = op.RawOpCode.Extract(45);
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bool negateA = op.RawOpCode.Extract(48);
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bool absoluteB = op.RawOpCode.Extract(49);
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Operand srcA = context.FPAbsNeg(GetSrcA(context), absoluteA, negateA);
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Operand srcB = context.FPAbsNeg(GetSrcB(context), absoluteB, negateB);
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Operand resMin = context.FPMinimum(srcA, srcB);
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Operand resMax = context.FPMaximum(srcA, srcB);
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Operand pred = GetPredicate39(context);
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Operand dest = GetDest(context);
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context.Copy(dest, context.ConditionalSelect(pred, resMin, resMax));
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SetFPZnFlags(context, dest, op.SetCondCode);
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}
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public static void Fmul(EmitterContext context) => EmitFPMultiply(context, Instruction.FP32);
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public static void Fset(EmitterContext context)
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{
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OpCodeSet op = (OpCodeSet)context.CurrOp;
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Condition cmpOp = (Condition)op.RawOpCode.Extract(48, 4);
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bool negateA = op.RawOpCode.Extract(43);
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bool absoluteB = op.RawOpCode.Extract(44);
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bool boolFloat = op.RawOpCode.Extract(52);
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bool negateB = op.RawOpCode.Extract(53);
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bool absoluteA = op.RawOpCode.Extract(54);
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Operand srcA = context.FPAbsNeg(GetSrcA(context), absoluteA, negateA);
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Operand srcB = context.FPAbsNeg(GetSrcB(context), absoluteB, negateB);
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Operand res = GetFPComparison(context, cmpOp, srcA, srcB);
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Operand pred = GetPredicate39(context);
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res = GetPredLogicalOp(context, op.LogicalOp, res, pred);
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Operand dest = GetDest(context);
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if (boolFloat)
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{
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res = context.ConditionalSelect(res, ConstF(1), Const(0));
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context.Copy(dest, res);
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SetFPZnFlags(context, res, op.SetCondCode);
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}
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else
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{
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context.Copy(dest, res);
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SetZnFlags(context, res, op.SetCondCode, op.Extended);
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}
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// TODO: X
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}
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public static void Fsetp(EmitterContext context)
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{
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OpCodeSet op = (OpCodeSet)context.CurrOp;
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Condition cmpOp = (Condition)op.RawOpCode.Extract(48, 4);
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bool negateB = op.RawOpCode.Extract(6);
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bool absoluteA = op.RawOpCode.Extract(7);
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bool negateA = op.RawOpCode.Extract(43);
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bool absoluteB = op.RawOpCode.Extract(44);
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Operand srcA = context.FPAbsNeg(GetSrcA(context), absoluteA, negateA);
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Operand srcB = context.FPAbsNeg(GetSrcB(context), absoluteB, negateB);
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Operand p0Res = GetFPComparison(context, cmpOp, srcA, srcB);
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Operand p1Res = context.BitwiseNot(p0Res);
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Operand pred = GetPredicate39(context);
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p0Res = GetPredLogicalOp(context, op.LogicalOp, p0Res, pred);
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p1Res = GetPredLogicalOp(context, op.LogicalOp, p1Res, pred);
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context.Copy(Register(op.Predicate3), p0Res);
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context.Copy(Register(op.Predicate0), p1Res);
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}
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public static void Fswzadd(EmitterContext context)
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{
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OpCodeAlu op = (OpCodeAlu)context.CurrOp;
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int mask = op.RawOpCode.Extract(28, 8);
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Operand srcA = GetSrcA(context);
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Operand srcB = GetSrcB(context);
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Operand dest = GetDest(context);
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context.Copy(dest, context.FPSwizzleAdd(srcA, srcB, mask));
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SetFPZnFlags(context, dest, op.SetCondCode);
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}
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public static void Hadd2(EmitterContext context)
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{
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Hadd2Hmul2Impl(context, isAdd: true);
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}
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public static void Hfma2(EmitterContext context)
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{
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IOpCodeHfma op = (IOpCodeHfma)context.CurrOp;
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Operand[] srcA = GetHfmaSrcA(context);
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Operand[] srcB = GetHfmaSrcB(context);
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Operand[] srcC = GetHfmaSrcC(context);
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Operand[] res = new Operand[2];
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for (int index = 0; index < res.Length; index++)
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{
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res[index] = context.FPFusedMultiplyAdd(srcA[index], srcB[index], srcC[index]);
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res[index] = context.FPSaturate(res[index], op.Saturate);
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}
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context.Copy(GetDest(context), GetHalfPacked(context, res));
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}
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public static void Hmul2(EmitterContext context)
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{
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Hadd2Hmul2Impl(context, isAdd: false);
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}
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private static void Hadd2Hmul2Impl(EmitterContext context, bool isAdd)
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{
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OpCode op = context.CurrOp;
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bool saturate = op.RawOpCode.Extract(op is IOpCodeReg ? 32 : 52);
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Operand[] srcA = GetHalfSrcA(context, isAdd);
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Operand[] srcB = GetHalfSrcB(context);
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Operand[] res = new Operand[2];
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for (int index = 0; index < res.Length; index++)
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{
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if (isAdd)
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{
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res[index] = context.FPAdd(srcA[index], srcB[index]);
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}
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else
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{
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res[index] = context.FPMultiply(srcA[index], srcB[index]);
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}
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res[index] = context.FPSaturate(res[index], saturate);
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}
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context.Copy(GetDest(context), GetHalfPacked(context, res));
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}
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public static void Hset2(EmitterContext context)
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{
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OpCodeSet op = (OpCodeSet)context.CurrOp;
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bool isRegVariant = op is IOpCodeReg;
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bool boolFloat = isRegVariant
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? op.RawOpCode.Extract(49)
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: op.RawOpCode.Extract(53);
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Condition cmpOp = isRegVariant
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? (Condition)op.RawOpCode.Extract(35, 4)
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: (Condition)op.RawOpCode.Extract(49, 4);
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Operand[] srcA = GetHalfSrcA(context);
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Operand[] srcB = GetHalfSrcB(context);
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Operand[] res = new Operand[2];
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res[0] = GetFPComparison(context, cmpOp, srcA[0], srcB[0]);
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res[1] = GetFPComparison(context, cmpOp, srcA[1], srcB[1]);
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Operand pred = GetPredicate39(context);
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res[0] = GetPredLogicalOp(context, op.LogicalOp, res[0], pred);
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res[1] = GetPredLogicalOp(context, op.LogicalOp, res[1], pred);
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if (boolFloat)
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{
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res[0] = context.ConditionalSelect(res[0], ConstF(1), Const(0));
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res[1] = context.ConditionalSelect(res[1], ConstF(1), Const(0));
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context.Copy(GetDest(context), context.PackHalf2x16(res[0], res[1]));
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}
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else
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{
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Operand low = context.BitwiseAnd(res[0], Const(0xffff));
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Operand high = context.ShiftLeft (res[1], Const(16));
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Operand packed = context.BitwiseOr(low, high);
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context.Copy(GetDest(context), packed);
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}
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}
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public static void Hsetp2(EmitterContext context)
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{
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OpCodeSet op = (OpCodeSet)context.CurrOp;
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bool isRegVariant = op is IOpCodeReg;
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bool hAnd = isRegVariant
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? op.RawOpCode.Extract(49)
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: op.RawOpCode.Extract(53);
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Condition cmpOp = isRegVariant
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? (Condition)op.RawOpCode.Extract(35, 4)
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: (Condition)op.RawOpCode.Extract(49, 4);
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Operand[] srcA = GetHalfSrcA(context);
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Operand[] srcB = GetHalfSrcB(context);
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Operand p0Res = GetFPComparison(context, cmpOp, srcA[0], srcB[0]);
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Operand p1Res = GetFPComparison(context, cmpOp, srcA[1], srcB[1]);
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if (hAnd)
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{
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p0Res = context.BitwiseAnd(p0Res, p1Res);
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p1Res = context.BitwiseNot(p0Res);
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}
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Operand pred = GetPredicate39(context);
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p0Res = GetPredLogicalOp(context, op.LogicalOp, p0Res, pred);
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p1Res = GetPredLogicalOp(context, op.LogicalOp, p1Res, pred);
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context.Copy(Register(op.Predicate3), p0Res);
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context.Copy(Register(op.Predicate0), p1Res);
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}
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public static void Mufu(EmitterContext context)
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{
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IOpCodeFArith op = (IOpCodeFArith)context.CurrOp;
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bool negateB = op.RawOpCode.Extract(48);
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Operand res = context.FPAbsNeg(GetSrcA(context), op.AbsoluteA, negateB);
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MufuOperation subOp = (MufuOperation)context.CurrOp.RawOpCode.Extract(20, 4);
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switch (subOp)
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{
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case MufuOperation.Cosine:
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res = context.FPCosine(res);
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break;
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case MufuOperation.Sine:
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res = context.FPSine(res);
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break;
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case MufuOperation.ExponentB2:
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res = context.FPExponentB2(res);
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break;
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case MufuOperation.LogarithmB2:
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res = context.FPLogarithmB2(res);
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break;
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case MufuOperation.Reciprocal:
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res = context.FPReciprocal(res);
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break;
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case MufuOperation.ReciprocalSquareRoot:
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res = context.FPReciprocalSquareRoot(res);
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break;
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case MufuOperation.SquareRoot:
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res = context.FPSquareRoot(res);
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break;
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default: /* TODO */ break;
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}
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context.Copy(GetDest(context), context.FPSaturate(res, op.Saturate));
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}
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private static void EmitFPAdd(EmitterContext context, Instruction fpType)
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{
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IOpCodeFArith op = (IOpCodeFArith)context.CurrOp;
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bool isFP64 = fpType == Instruction.FP64;
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bool absoluteA = op.AbsoluteA, absoluteB, negateA, negateB;
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if (op is OpCodeFArithImm32)
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{
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negateB = op.RawOpCode.Extract(53);
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negateA = op.RawOpCode.Extract(56);
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absoluteB = op.RawOpCode.Extract(57);
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}
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else
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{
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negateB = op.RawOpCode.Extract(45);
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negateA = op.RawOpCode.Extract(48);
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absoluteB = op.RawOpCode.Extract(49);
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}
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Operand srcA = context.FPAbsNeg(GetSrcA(context, isFP64), absoluteA, negateA, fpType);
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Operand srcB = context.FPAbsNeg(GetSrcB(context, isFP64), absoluteB, negateB, fpType);
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Operand res = context.FPSaturate(context.FPAdd(srcA, srcB, fpType), op.Saturate, fpType);
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SetDest(context, res, isFP64);
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SetFPZnFlags(context, res, op.SetCondCode, fpType);
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}
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private static void EmitFPFma(EmitterContext context, Instruction fpType)
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{
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IOpCodeFArith op = (IOpCodeFArith)context.CurrOp;
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bool isFP64 = fpType == Instruction.FP64;
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bool negateB = op.RawOpCode.Extract(48);
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bool negateC = op.RawOpCode.Extract(49);
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Operand srcA = GetSrcA(context, isFP64);
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Operand srcB = context.FPNegate(GetSrcB(context, isFP64), negateB, fpType);
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Operand srcC = context.FPNegate(GetSrcC(context, isFP64), negateC, fpType);
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Operand res = context.FPSaturate(context.FPFusedMultiplyAdd(srcA, srcB, srcC, fpType), op.Saturate, fpType);
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SetDest(context, res, isFP64);
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SetFPZnFlags(context, res, op.SetCondCode, fpType);
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}
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private static void EmitFPMultiply(EmitterContext context, Instruction fpType)
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{
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IOpCodeFArith op = (IOpCodeFArith)context.CurrOp;
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bool isFP64 = fpType == Instruction.FP64;
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bool isImm32 = op is OpCodeFArithImm32;
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bool negateB = !isImm32 && op.RawOpCode.Extract(48);
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Operand srcA = GetSrcA(context, isFP64);
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Operand srcB = context.FPNegate(GetSrcB(context, isFP64), negateB, fpType);
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if (op.Scale != FPMultiplyScale.None)
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{
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Operand scale = op.Scale switch
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{
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FPMultiplyScale.Divide2 => ConstF(0.5f),
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FPMultiplyScale.Divide4 => ConstF(0.25f),
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FPMultiplyScale.Divide8 => ConstF(0.125f),
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FPMultiplyScale.Multiply2 => ConstF(2f),
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FPMultiplyScale.Multiply4 => ConstF(4f),
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FPMultiplyScale.Multiply8 => ConstF(8f),
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_ => ConstF(1) // Invalid, behave as if it had no scale.
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};
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if (scale.AsFloat() == 1)
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{
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context.Config.PrintLog($"Invalid FP multiply scale \"{op.Scale}\".");
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}
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if (isFP64)
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{
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scale = context.FP32ConvertToFP64(scale);
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}
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srcA = context.FPMultiply(srcA, scale, fpType);
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}
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bool saturate = isImm32 ? op.RawOpCode.Extract(55) : op.Saturate;
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Operand res = context.FPSaturate(context.FPMultiply(srcA, srcB, fpType), saturate, fpType);
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SetDest(context, res, isFP64);
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SetFPZnFlags(context, res, op.SetCondCode, fpType);
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}
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private static Operand GetFPComparison(
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EmitterContext context,
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Condition cond,
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Operand srcA,
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Operand srcB)
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{
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Operand res;
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if (cond == Condition.Always)
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{
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res = Const(IrConsts.True);
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}
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else if (cond == Condition.Never)
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{
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res = Const(IrConsts.False);
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}
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else if (cond == Condition.Nan || cond == Condition.Number)
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{
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res = context.BitwiseOr(context.IsNan(srcA), context.IsNan(srcB));
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if (cond == Condition.Number)
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{
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res = context.BitwiseNot(res);
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}
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}
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else
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{
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Instruction inst;
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switch (cond & ~Condition.Nan)
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{
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case Condition.Less: inst = Instruction.CompareLess; break;
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case Condition.Equal: inst = Instruction.CompareEqual; break;
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case Condition.LessOrEqual: inst = Instruction.CompareLessOrEqual; break;
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case Condition.Greater: inst = Instruction.CompareGreater; break;
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case Condition.NotEqual: inst = Instruction.CompareNotEqual; break;
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case Condition.GreaterOrEqual: inst = Instruction.CompareGreaterOrEqual; break;
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default: throw new InvalidOperationException($"Unexpected condition \"{cond}\".");
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}
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res = context.Add(inst | Instruction.FP32, Local(), srcA, srcB);
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if ((cond & Condition.Nan) != 0)
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{
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res = context.BitwiseOr(res, context.IsNan(srcA));
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res = context.BitwiseOr(res, context.IsNan(srcB));
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}
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}
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return res;
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}
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private static Operand[] GetHfmaSrcA(EmitterContext context)
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{
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IOpCodeHfma op = (IOpCodeHfma)context.CurrOp;
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return GetHalfUnpacked(context, GetSrcA(context), op.SwizzleA);
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}
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private static Operand[] GetHfmaSrcB(EmitterContext context)
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{
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IOpCodeHfma op = (IOpCodeHfma)context.CurrOp;
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Operand[] operands = GetHalfUnpacked(context, GetSrcB(context), op.SwizzleB);
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return FPAbsNeg(context, operands, false, op.NegateB);
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}
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private static Operand[] GetHfmaSrcC(EmitterContext context)
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{
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IOpCodeHfma op = (IOpCodeHfma)context.CurrOp;
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Operand[] operands = GetHalfUnpacked(context, GetSrcC(context), op.SwizzleC);
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return FPAbsNeg(context, operands, false, op.NegateC);
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}
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private static void SetDest(EmitterContext context, Operand value, bool isFP64)
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{
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if (isFP64)
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{
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IOpCodeRd op = (IOpCodeRd)context.CurrOp;
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|
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context.Copy(Register(op.Rd.Index, op.Rd.Type), context.UnpackDouble2x32Low(value));
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context.Copy(Register(op.Rd.Index | 1, op.Rd.Type), context.UnpackDouble2x32High(value));
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}
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else
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{
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context.Copy(GetDest(context), value);
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}
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}
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}
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} |