forked from Mirror/Ryujinx
42e4e02a64
* Update AOpCodeTable.cs * Update AInstEmitSimdCvt.cs * Update Pseudocode.cs * Update Instructions.cs * Update CpuTestSimd.cs * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update Instructions.cs * Update CpuTestSimdReg.cs * Update CpuTestSimd.cs * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update Instructions.cs * Update CpuTestSimdReg.cs * Add QCFlagBit. * Add QCFlagBit.
640 lines
18 KiB
C#
640 lines
18 KiB
C#
using ChocolArm64.Decoder;
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System;
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using System.Reflection.Emit;
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using static ChocolArm64.Instruction.AInstEmitSimdHelper;
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namespace ChocolArm64.Instruction
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{
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static partial class AInstEmit
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{
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public static void Fcvt_S(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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EmitVectorExtractF(Context, Op.Rn, 0, Op.Size);
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EmitFloatCast(Context, Op.Opc);
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EmitScalarSetF(Context, Op.Rd, Op.Opc);
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}
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public static void Fcvtas_Gp(AILEmitterCtx Context)
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{
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EmitFcvt_s_Gp(Context, () => EmitRoundMathCall(Context, MidpointRounding.AwayFromZero));
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}
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public static void Fcvtau_Gp(AILEmitterCtx Context)
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{
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EmitFcvt_u_Gp(Context, () => EmitRoundMathCall(Context, MidpointRounding.AwayFromZero));
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}
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public static void Fcvtl_V(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int SizeF = Op.Size & 1;
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int Elems = 4 >> SizeF;
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int Part = Context.CurrOp.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
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for (int Index = 0; Index < Elems; Index++)
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{
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if (SizeF == 0)
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{
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EmitVectorExtractZx(Context, Op.Rn, Part + Index, 1);
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Context.Emit(OpCodes.Conv_U2);
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Context.EmitCall(typeof(ASoftFloat), nameof(ASoftFloat.ConvertHalfToSingle));
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}
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else /* if (SizeF == 1) */
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{
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EmitVectorExtractF(Context, Op.Rn, Part + Index, 0);
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Context.Emit(OpCodes.Conv_R8);
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}
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EmitVectorInsertF(Context, Op.Rd, Index, SizeF);
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}
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}
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public static void Fcvtms_Gp(AILEmitterCtx Context)
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{
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EmitFcvt_s_Gp(Context, () => EmitUnaryMathCall(Context, nameof(Math.Floor)));
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}
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public static void Fcvtmu_Gp(AILEmitterCtx Context)
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{
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EmitFcvt_u_Gp(Context, () => EmitUnaryMathCall(Context, nameof(Math.Floor)));
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}
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public static void Fcvtn_V(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int SizeF = Op.Size & 1;
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int Elems = 4 >> SizeF;
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int Part = Context.CurrOp.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
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for (int Index = 0; Index < Elems; Index++)
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{
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EmitVectorExtractF(Context, Op.Rd, Index, SizeF);
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if (SizeF == 0)
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{
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//TODO: This need the half precision floating point type,
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//that is not yet supported on .NET. We should probably
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//do our own implementation on the meantime.
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throw new NotImplementedException();
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}
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else /* if (SizeF == 1) */
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{
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Context.Emit(OpCodes.Conv_R4);
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EmitVectorInsertF(Context, Op.Rd, Part + Index, 0);
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}
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}
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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public static void Fcvtns_S(AILEmitterCtx Context)
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{
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EmitFcvtn(Context, Signed: true, Scalar: true);
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}
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public static void Fcvtns_V(AILEmitterCtx Context)
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{
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EmitFcvtn(Context, Signed: true, Scalar: false);
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}
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public static void Fcvtnu_S(AILEmitterCtx Context)
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{
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EmitFcvtn(Context, Signed: false, Scalar: true);
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}
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public static void Fcvtnu_V(AILEmitterCtx Context)
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{
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EmitFcvtn(Context, Signed: false, Scalar: false);
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}
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public static void Fcvtps_Gp(AILEmitterCtx Context)
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{
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EmitFcvt_s_Gp(Context, () => EmitUnaryMathCall(Context, nameof(Math.Ceiling)));
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}
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public static void Fcvtpu_Gp(AILEmitterCtx Context)
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{
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EmitFcvt_u_Gp(Context, () => EmitUnaryMathCall(Context, nameof(Math.Ceiling)));
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}
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public static void Fcvtzs_Gp(AILEmitterCtx Context)
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{
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EmitFcvt_s_Gp(Context, () => { });
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}
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public static void Fcvtzs_Gp_Fix(AILEmitterCtx Context)
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{
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EmitFcvtzs_Gp_Fix(Context);
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}
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public static void Fcvtzs_S(AILEmitterCtx Context)
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{
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EmitScalarFcvtzs(Context);
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}
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public static void Fcvtzs_V(AILEmitterCtx Context)
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{
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EmitVectorFcvtzs(Context);
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}
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public static void Fcvtzu_Gp(AILEmitterCtx Context)
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{
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EmitFcvt_u_Gp(Context, () => { });
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}
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public static void Fcvtzu_Gp_Fix(AILEmitterCtx Context)
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{
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EmitFcvtzu_Gp_Fix(Context);
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}
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public static void Fcvtzu_S(AILEmitterCtx Context)
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{
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EmitScalarFcvtzu(Context);
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}
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public static void Fcvtzu_V(AILEmitterCtx Context)
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{
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EmitVectorFcvtzu(Context);
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}
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public static void Scvtf_Gp(AILEmitterCtx Context)
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{
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AOpCodeSimdCvt Op = (AOpCodeSimdCvt)Context.CurrOp;
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Context.EmitLdintzr(Op.Rn);
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if (Context.CurrOp.RegisterSize == ARegisterSize.Int32)
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{
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Context.Emit(OpCodes.Conv_U4);
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}
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EmitFloatCast(Context, Op.Size);
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EmitScalarSetF(Context, Op.Rd, Op.Size);
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}
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public static void Scvtf_S(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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EmitVectorExtractSx(Context, Op.Rn, 0, Op.Size + 2);
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EmitFloatCast(Context, Op.Size);
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EmitScalarSetF(Context, Op.Rd, Op.Size);
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}
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public static void Scvtf_V(AILEmitterCtx Context)
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{
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EmitVectorCvtf(Context, Signed: true);
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}
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public static void Ucvtf_Gp(AILEmitterCtx Context)
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{
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AOpCodeSimdCvt Op = (AOpCodeSimdCvt)Context.CurrOp;
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Context.EmitLdintzr(Op.Rn);
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if (Context.CurrOp.RegisterSize == ARegisterSize.Int32)
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{
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Context.Emit(OpCodes.Conv_U4);
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}
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Context.Emit(OpCodes.Conv_R_Un);
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EmitFloatCast(Context, Op.Size);
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EmitScalarSetF(Context, Op.Rd, Op.Size);
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}
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public static void Ucvtf_S(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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EmitVectorExtractZx(Context, Op.Rn, 0, Op.Size + 2);
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Context.Emit(OpCodes.Conv_R_Un);
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EmitFloatCast(Context, Op.Size);
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EmitScalarSetF(Context, Op.Rd, Op.Size);
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}
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public static void Ucvtf_V(AILEmitterCtx Context)
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{
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EmitVectorCvtf(Context, Signed: false);
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}
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private static int GetFBits(AILEmitterCtx Context)
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{
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if (Context.CurrOp is AOpCodeSimdShImm Op)
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{
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return GetImmShr(Op);
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}
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return 0;
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}
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private static void EmitFloatCast(AILEmitterCtx Context, int Size)
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{
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if (Size == 0)
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{
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Context.Emit(OpCodes.Conv_R4);
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}
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else if (Size == 1)
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{
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Context.Emit(OpCodes.Conv_R8);
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}
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else
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{
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throw new ArgumentOutOfRangeException(nameof(Size));
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}
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}
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private static void EmitFcvtn(AILEmitterCtx Context, bool Signed, bool Scalar)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int SizeF = Op.Size & 1;
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int SizeI = SizeF + 2;
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int Bytes = Op.GetBitsCount() >> 3;
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int Elems = !Scalar ? Bytes >> SizeI : 1;
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if (Scalar && (SizeF == 0))
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{
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EmitVectorZeroLowerTmp(Context);
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}
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for (int Index = 0; Index < Elems; Index++)
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{
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EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
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EmitRoundMathCall(Context, MidpointRounding.ToEven);
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if (SizeF == 0)
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{
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AVectorHelper.EmitCall(Context, Signed
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? nameof(AVectorHelper.SatF32ToS32)
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: nameof(AVectorHelper.SatF32ToU32));
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Context.Emit(OpCodes.Conv_U8);
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}
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else /* if (SizeF == 1) */
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{
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AVectorHelper.EmitCall(Context, Signed
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? nameof(AVectorHelper.SatF64ToS64)
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: nameof(AVectorHelper.SatF64ToU64));
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}
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EmitVectorInsertTmp(Context, Index, SizeI);
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}
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Context.EmitLdvectmp();
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Context.EmitStvec(Op.Rd);
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if ((Op.RegisterSize == ARegisterSize.SIMD64) || Scalar)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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private static void EmitFcvt_s_Gp(AILEmitterCtx Context, Action Emit)
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{
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EmitFcvt___Gp(Context, Emit, true);
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}
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private static void EmitFcvt_u_Gp(AILEmitterCtx Context, Action Emit)
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{
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EmitFcvt___Gp(Context, Emit, false);
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}
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private static void EmitFcvt___Gp(AILEmitterCtx Context, Action Emit, bool Signed)
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{
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AOpCodeSimdCvt Op = (AOpCodeSimdCvt)Context.CurrOp;
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EmitVectorExtractF(Context, Op.Rn, 0, Op.Size);
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Emit();
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if (Signed)
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{
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EmitScalarFcvts(Context, Op.Size, 0);
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}
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else
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{
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EmitScalarFcvtu(Context, Op.Size, 0);
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}
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if (Context.CurrOp.RegisterSize == ARegisterSize.Int32)
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{
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Context.Emit(OpCodes.Conv_U8);
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}
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Context.EmitStintzr(Op.Rd);
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}
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private static void EmitFcvtzs_Gp_Fix(AILEmitterCtx Context)
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{
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EmitFcvtz__Gp_Fix(Context, true);
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}
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private static void EmitFcvtzu_Gp_Fix(AILEmitterCtx Context)
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{
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EmitFcvtz__Gp_Fix(Context, false);
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}
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private static void EmitFcvtz__Gp_Fix(AILEmitterCtx Context, bool Signed)
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{
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AOpCodeSimdCvt Op = (AOpCodeSimdCvt)Context.CurrOp;
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EmitVectorExtractF(Context, Op.Rn, 0, Op.Size);
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if (Signed)
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{
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EmitScalarFcvts(Context, Op.Size, Op.FBits);
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}
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else
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{
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EmitScalarFcvtu(Context, Op.Size, Op.FBits);
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}
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if (Context.CurrOp.RegisterSize == ARegisterSize.Int32)
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{
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Context.Emit(OpCodes.Conv_U8);
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}
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Context.EmitStintzr(Op.Rd);
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}
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private static void EmitVectorScvtf(AILEmitterCtx Context)
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{
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EmitVectorCvtf(Context, true);
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}
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private static void EmitVectorUcvtf(AILEmitterCtx Context)
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{
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EmitVectorCvtf(Context, false);
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}
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private static void EmitVectorCvtf(AILEmitterCtx Context, bool Signed)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int SizeF = Op.Size & 1;
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int SizeI = SizeF + 2;
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int FBits = GetFBits(Context);
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int Bytes = Op.GetBitsCount() >> 3;
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for (int Index = 0; Index < (Bytes >> SizeI); Index++)
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{
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EmitVectorExtract(Context, Op.Rn, Index, SizeI, Signed);
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if (!Signed)
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{
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Context.Emit(OpCodes.Conv_R_Un);
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}
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Context.Emit(SizeF == 0
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? OpCodes.Conv_R4
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: OpCodes.Conv_R8);
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EmitI2fFBitsMul(Context, SizeF, FBits);
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EmitVectorInsertF(Context, Op.Rd, Index, SizeF);
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}
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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private static void EmitScalarFcvtzs(AILEmitterCtx Context)
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{
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EmitScalarFcvtz(Context, true);
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}
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private static void EmitScalarFcvtzu(AILEmitterCtx Context)
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{
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EmitScalarFcvtz(Context, false);
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}
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private static void EmitScalarFcvtz(AILEmitterCtx Context, bool Signed)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int SizeF = Op.Size & 1;
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int SizeI = SizeF + 2;
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int FBits = GetFBits(Context);
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EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
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EmitF2iFBitsMul(Context, SizeF, FBits);
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if (SizeF == 0)
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{
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AVectorHelper.EmitCall(Context, Signed
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? nameof(AVectorHelper.SatF32ToS32)
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: nameof(AVectorHelper.SatF32ToU32));
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}
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else /* if (SizeF == 1) */
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{
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AVectorHelper.EmitCall(Context, Signed
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? nameof(AVectorHelper.SatF64ToS64)
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: nameof(AVectorHelper.SatF64ToU64));
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}
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if (SizeF == 0)
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{
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Context.Emit(OpCodes.Conv_U8);
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}
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EmitScalarSet(Context, Op.Rd, SizeI);
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}
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private static void EmitVectorFcvtzs(AILEmitterCtx Context)
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{
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EmitVectorFcvtz(Context, true);
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}
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private static void EmitVectorFcvtzu(AILEmitterCtx Context)
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{
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EmitVectorFcvtz(Context, false);
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}
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private static void EmitVectorFcvtz(AILEmitterCtx Context, bool Signed)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int SizeF = Op.Size & 1;
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int SizeI = SizeF + 2;
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int FBits = GetFBits(Context);
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int Bytes = Op.GetBitsCount() >> 3;
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for (int Index = 0; Index < (Bytes >> SizeI); Index++)
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{
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EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
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EmitF2iFBitsMul(Context, SizeF, FBits);
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if (SizeF == 0)
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{
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AVectorHelper.EmitCall(Context, Signed
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? nameof(AVectorHelper.SatF32ToS32)
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: nameof(AVectorHelper.SatF32ToU32));
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}
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else /* if (SizeF == 1) */
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{
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AVectorHelper.EmitCall(Context, Signed
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? nameof(AVectorHelper.SatF64ToS64)
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: nameof(AVectorHelper.SatF64ToU64));
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}
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if (SizeF == 0)
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{
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Context.Emit(OpCodes.Conv_U8);
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}
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EmitVectorInsert(Context, Op.Rd, Index, SizeI);
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}
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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private static void EmitScalarFcvts(AILEmitterCtx Context, int Size, int FBits)
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{
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if (Size < 0 || Size > 1)
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{
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throw new ArgumentOutOfRangeException(nameof(Size));
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}
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EmitF2iFBitsMul(Context, Size, FBits);
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if (Context.CurrOp.RegisterSize == ARegisterSize.Int32)
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{
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if (Size == 0)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.SatF32ToS32));
|
|
}
|
|
else /* if (Size == 1) */
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.SatF64ToS32));
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (Size == 0)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.SatF32ToS64));
|
|
}
|
|
else /* if (Size == 1) */
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.SatF64ToS64));
|
|
}
|
|
}
|
|
}
|
|
|
|
private static void EmitScalarFcvtu(AILEmitterCtx Context, int Size, int FBits)
|
|
{
|
|
if (Size < 0 || Size > 1)
|
|
{
|
|
throw new ArgumentOutOfRangeException(nameof(Size));
|
|
}
|
|
|
|
EmitF2iFBitsMul(Context, Size, FBits);
|
|
|
|
if (Context.CurrOp.RegisterSize == ARegisterSize.Int32)
|
|
{
|
|
if (Size == 0)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.SatF32ToU32));
|
|
}
|
|
else /* if (Size == 1) */
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.SatF64ToU32));
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (Size == 0)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.SatF32ToU64));
|
|
}
|
|
else /* if (Size == 1) */
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.SatF64ToU64));
|
|
}
|
|
}
|
|
}
|
|
|
|
private static void EmitF2iFBitsMul(AILEmitterCtx Context, int Size, int FBits)
|
|
{
|
|
if (FBits != 0)
|
|
{
|
|
if (Size == 0)
|
|
{
|
|
Context.EmitLdc_R4(MathF.Pow(2, FBits));
|
|
}
|
|
else if (Size == 1)
|
|
{
|
|
Context.EmitLdc_R8(Math.Pow(2, FBits));
|
|
}
|
|
else
|
|
{
|
|
throw new ArgumentOutOfRangeException(nameof(Size));
|
|
}
|
|
|
|
Context.Emit(OpCodes.Mul);
|
|
}
|
|
}
|
|
|
|
private static void EmitI2fFBitsMul(AILEmitterCtx Context, int Size, int FBits)
|
|
{
|
|
if (FBits != 0)
|
|
{
|
|
if (Size == 0)
|
|
{
|
|
Context.EmitLdc_R4(1f / MathF.Pow(2, FBits));
|
|
}
|
|
else if (Size == 1)
|
|
{
|
|
Context.EmitLdc_R8(1 / Math.Pow(2, FBits));
|
|
}
|
|
else
|
|
{
|
|
throw new ArgumentOutOfRangeException(nameof(Size));
|
|
}
|
|
|
|
Context.Emit(OpCodes.Mul);
|
|
}
|
|
}
|
|
}
|
|
}
|