embassy/embassy-stm32f4/src/serial.rs

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//! Async low power Serial.
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//!
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//! The peripheral is autmatically enabled and disabled as required to save power.
//! Lowest power consumption can only be guaranteed if the send receive futures
//! are dropped correctly (e.g. not using `mem::forget()`).
use core::future::Future;
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use core::task::{Context, Poll};
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use embassy::interrupt::OwnedInterrupt;
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use embassy::util::Signal;
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use embedded_dma::{StaticReadBuffer, StaticWriteBuffer, WriteBuffer};
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use crate::hal::dma::config::DmaConfig;
use crate::hal::dma::traits::{PeriAddress, Stream};
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use crate::hal::dma::{
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Channel4, MemoryToPeripheral, PeripheralToMemory, Stream2, Stream7, StreamsTuple, Transfer,
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};
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use crate::hal::gpio::gpioa::{PA10, PA9};
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use crate::hal::gpio::{Alternate, AF7};
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use crate::hal::prelude::*;
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use crate::hal::rcc::Clocks;
use crate::hal::serial::config::{
Config as SerialConfig, DmaConfig as SerialDmaConfig, Parity, StopBits, WordLength,
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};
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use crate::hal::serial::{Event as SerialEvent, Serial as HalSerial};
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use crate::hal::time::Bps;
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use crate::interrupt;
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use crate::pac::Interrupt;
use crate::pac::{DMA2, USART1};
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/// Interface to the Serial peripheral
pub struct Serial<USART: PeriAddress<MemSize = u8>, TSTREAM: Stream, RSTREAM: Stream> {
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// tx_transfer: Transfer<Stream7<DMA2>, Channel4, USART1, MemoryToPeripheral, &mut [u8; 20]>,
// rx_transfer: Transfer<Stream2<DMA2>, Channel4, USART1, PeripheralToMemory, &mut [u8; 20]>,
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tx_stream: Option<TSTREAM>,
rx_stream: Option<RSTREAM>,
usart: Option<USART>,
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}
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struct State {
tx_done: Signal<()>,
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rx_done: Signal<()>,
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}
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static STATE: State = State {
tx_done: Signal::new(),
rx_done: Signal::new(),
};
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impl Serial<USART1, Stream7<DMA2>, Stream2<DMA2>> {
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pub fn new(
txd: PA9<Alternate<AF7>>,
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rxd: PA10<Alternate<AF7>>,
tx_int: interrupt::DMA2_STREAM2Interrupt,
rx_int: interrupt::DMA2_STREAM7Interrupt,
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dma: DMA2,
usart: USART1,
parity: Parity,
baudrate: Bps,
clocks: Clocks,
) -> Self {
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let serial = HalSerial::usart1(
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usart,
(txd, rxd),
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SerialConfig {
baudrate: baudrate,
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wordlength: WordLength::DataBits8,
parity: Parity::ParityNone,
stopbits: StopBits::STOP1,
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dma: SerialDmaConfig::TxRx,
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},
clocks,
)
.unwrap();
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let (usart, _) = serial.release();
// serial.listen(SerialEvent::Idle);
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// Register ISR
tx_int.set_handler(Self::on_tx_irq);
tx_int.unpend();
tx_int.enable();
rx_int.set_handler(Self::on_rx_irq);
rx_int.unpend();
rx_int.enable();
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let streams = StreamsTuple::new(dma);
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Serial {
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tx_stream: Some(streams.7),
rx_stream: Some(streams.2),
usart: Some(usart),
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}
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}
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unsafe fn on_tx_irq() {
STATE.tx_done.signal(());
}
unsafe fn on_rx_irq() {
STATE.rx_done.signal(());
}
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/// Sends serial data.
///
/// `tx_buffer` is marked as static as per `embedded-dma` requirements.
/// It it safe to use a buffer with a non static lifetime if memory is not
/// reused until the future has finished.
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pub fn send<'a, B>(
&'a mut self,
tx_buffer: B,
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) -> SendFuture<'a, B, USART1, Stream7<DMA2>, Stream2<DMA2>, Channel4>
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where
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B: WriteBuffer<Word = u8> + 'static,
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{
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let tx_stream = self.tx_stream.take().unwrap();
let usart = self.usart.take().unwrap();
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let mut tx_transfer = Transfer::init(
tx_stream,
usart,
tx_buffer,
None,
DmaConfig::default()
.transfer_complete_interrupt(true)
.memory_increment(true)
.double_buffer(false),
);
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STATE.tx_done.reset();
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SendFuture {
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Serial: self,
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tx_transfer: Some(tx_transfer),
// tx_stream: Some(tx_stream),
// usart: Some(usart),
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}
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}
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/// Receives serial data.
///
/// The future is pending until the buffer is completely filled.
/// A common pattern is to use [`stop()`](ReceiveFuture::stop) to cancel
/// unfinished transfers after a timeout to prevent lockup when no more data
/// is incoming.
///
/// `rx_buffer` is marked as static as per `embedded-dma` requirements.
/// It it safe to use a buffer with a non static lifetime if memory is not
/// reused until the future has finished.
pub fn receive<'a, B>(
&'a mut self,
rx_buffer: B,
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) -> ReceiveFuture<'a, B, USART1, Stream7<DMA2>, Stream2<DMA2>, Channel4>
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where
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B: WriteBuffer<Word = u8> + 'static,
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{
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let rx_stream = self.rx_stream.take().unwrap();
let usart = self.usart.take().unwrap();
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let mut rx_transfer = Transfer::init(
rx_stream,
usart,
rx_buffer,
None,
DmaConfig::default()
.transfer_complete_interrupt(true)
.half_transfer_interrupt(true)
.memory_increment(true)
.double_buffer(false),
);
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STATE.rx_done.reset();
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ReceiveFuture {
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Serial: self,
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rx_transfer: Some(rx_transfer),
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}
}
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}
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/// Future for the [`LowPowerSerial::send()`] method.
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pub struct SendFuture<
'a,
B: WriteBuffer<Word = u8> + 'static,
USART: PeriAddress<MemSize = u8>,
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TSTREAM: Stream,
RSTREAM: Stream,
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CHANNEL,
> {
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Serial: &'a mut Serial<USART, TSTREAM, RSTREAM>,
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tx_transfer: Option<Transfer<TSTREAM, CHANNEL, USART, MemoryToPeripheral, B>>,
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}
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// impl<'a, B> Drop for SendFuture<'a, B>
// where
// B: WriteBuffer<Word = u8> + 'static,
// {
// fn drop(self: &mut Self) {}
// }
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impl<'a, B> Future for SendFuture<'a, B, USART1, Stream7<DMA2>, Stream2<DMA2>, Channel4>
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where
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B: WriteBuffer<Word = u8> + 'static,
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{
type Output = ();
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fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<()> {
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let Self {
Serial,
tx_transfer,
} = unsafe { self.get_unchecked_mut() };
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let mut taken = tx_transfer.take().unwrap();
if Stream7::<DMA2>::get_transfer_complete_flag() {
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let (tx_stream, usart, buf, _) = taken.free();
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Serial.tx_stream.replace(tx_stream);
Serial.usart.replace(usart);
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Poll::Ready(())
} else {
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// waker_interrupt!(DMA2_STREAM7, cx.waker().clone());
taken.start(|_usart| {});
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tx_transfer.replace(taken);
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// Poll::Pending
STATE.tx_done.poll_wait(cx)
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}
}
}
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/// Future for the [`Serial::receive()`] method.
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pub struct ReceiveFuture<
'a,
B: WriteBuffer<Word = u8> + 'static,
USART: PeriAddress<MemSize = u8>,
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TSTREAM: Stream,
RSTREAM: Stream,
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CHANNEL,
> {
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Serial: &'a mut Serial<USART, TSTREAM, RSTREAM>,
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rx_transfer: Option<Transfer<RSTREAM, CHANNEL, USART, PeripheralToMemory, B>>,
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}
// impl<'a, B> Drop for ReceiveFuture<'a, B, USART1, Stream7<DMA2>, Channel4>
// where
// B: WriteBuffer<Word = u8> + 'static,
// {
// fn drop(self: &mut Self) {}
// }
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impl<'a, B> Future for ReceiveFuture<'a, B, USART1, Stream7<DMA2>, Stream2<DMA2>, Channel4>
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where
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B: WriteBuffer<Word = u8> + 'static + Unpin,
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{
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type Output = B;
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fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<B> {
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let Self {
Serial,
rx_transfer,
} = unsafe { self.get_unchecked_mut() };
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let mut taken = rx_transfer.take().unwrap();
if Stream7::<DMA2>::get_transfer_complete_flag() {
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let (rx_stream, usart, buf, _) = rx_transfer.take().unwrap().free();
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Serial.rx_stream.replace(rx_stream);
Serial.usart.replace(usart);
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Poll::Ready(buf)
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} else {
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// waker_interrupt!(DMA2_STREAM2, cx.waker().clone());
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taken.start(|_usart| {});
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rx_transfer.replace(taken);
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STATE.rx_done.poll_wait(cx);
/*
Note: we have to do this because rx_transfer owns the buffer and we can't
access it until the transfer is completed. Therefore we can't pass
the buffer to poll_wait, but we still need to be woken.
*/
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Poll::Pending
}
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}
}