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Adjust to DMA1EN in the rcc for l0.

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This commit is contained in:
Bob McWhirter 2021-07-12 14:11:18 -04:00
parent d31e30f382
commit 06e899b14c
3 changed files with 4 additions and 4 deletions
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2
embassy-stm32/src/rcc/l0/mod.rs
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@ -170,7 +170,7 @@ impl<'d> Rcc<'d> {
pub fn enable_debug_wfe(&mut self, _dbg: &mut peripherals::DBGMCU, enable_dma: bool) { pub fn enable_debug_wfe(&mut self, _dbg: &mut peripherals::DBGMCU, enable_dma: bool) {
// NOTE(unsafe) We have exclusive access to the RCC and DBGMCU // NOTE(unsafe) We have exclusive access to the RCC and DBGMCU
unsafe { unsafe {
pac::RCC.ahbenr().modify(|w| w.set_dmaen(enable_dma)); pac::RCC.ahbenr().modify(|w| w.set_dma1en(enable_dma));
pac::DBGMCU.cr().modify(|w| { pac::DBGMCU.cr().modify(|w| {
w.set_dbg_sleep(true); w.set_dbg_sleep(true);

2
stm32-data

@ -1 +1 @@
Subproject commit 5c3d2df911c8530d4584c731a5de99951858fccd Subproject commit 9ff09761f32da472319756c1c2cd814fda10b571

4
stm32-metapac-gen/src/lib.rs
View file

@ -390,8 +390,8 @@ pub fn gen(options: Options) {
if let Some(clock_prefix) = clock_prefix { if let Some(clock_prefix) = clock_prefix {
// Workaround for clock registers being split on some chip families. Assume fields are // Workaround for clock registers being split on some chip families. Assume fields are
// named after peripheral and look for first field matching and use that register. // named after peripheral and look for first field matching and use that register.
let mut en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name)); let en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name));
let mut rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name)); let rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name));
match (en, rst) { match (en, rst) {
(Some((enable_reg, enable_field)), Some((reset_reg, reset_field))) => { (Some((enable_reg, enable_field)), Some((reset_reg, reset_field))) => {