NaxdyOrg/embassy
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

stm32/adc: reexport enums from PAC to avoid boilerplate hell.

Browse source
This commit is contained in:
Dario Nieuwenhuis 2024-02-26 02:58:03 +01:00
parent a308b9ac2f
commit 72c6f9a101
18 changed files with 82 additions and 288 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
embassy-stm32/Cargo.toml
View file

@ -70,7 +70,7 @@ rand_core = "0.6.3"
sdio-host = "0.5.0"
critical-section = "1.1"
#stm32-metapac = { version = "15" }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-88f71cbcd2f048c40bad162c7e7864cc3897eba4" }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-7c8b53413499acc3273b706318777a60f932d77a" }
vcell = "0.1.3"
bxcan = "0.7.0"
nb = "1.0.0"
@ -94,7 +94,7 @@ critical-section = { version = "1.1", features = ["std"] }
proc-macro2 = "1.0.36"
quote = "1.0.15"
#stm32-metapac = { version = "15", default-features = false, features = ["metadata"]}
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-88f71cbcd2f048c40bad162c7e7864cc3897eba4", default-features = false, features = ["metadata"]}
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-7c8b53413499acc3273b706318777a60f932d77a", default-features = false, features = ["metadata"]}
[features]

18
embassy-stm32/src/adc/f1.rs
View file

@ -74,7 +74,7 @@ impl<'d, T: Instance> Adc<'d, T> {
Self {
adc,
sample_time: Default::default(),
sample_time: SampleTime::from_bits(0),
}
}
@ -84,14 +84,14 @@ impl<'d, T: Instance> Adc<'d, T> {
pub fn sample_time_for_us(&self, us: u32) -> SampleTime {
match us * Self::freq().0 / 1_000_000 {
0..=1 => SampleTime::Cycles1_5,
2..=7 => SampleTime::Cycles7_5,
8..=13 => SampleTime::Cycles13_5,
14..=28 => SampleTime::Cycles28_5,
29..=41 => SampleTime::Cycles41_5,
42..=55 => SampleTime::Cycles55_5,
56..=71 => SampleTime::Cycles71_5,
_ => SampleTime::Cycles239_5,
0..=1 => SampleTime::CYCLES1_5,
2..=7 => SampleTime::CYCLES7_5,
8..=13 => SampleTime::CYCLES13_5,
14..=28 => SampleTime::CYCLES28_5,
29..=41 => SampleTime::CYCLES41_5,
42..=55 => SampleTime::CYCLES55_5,
56..=71 => SampleTime::CYCLES71_5,
_ => SampleTime::CYCLES239_5,
}
}

16
embassy-stm32/src/adc/f3.rs
View file

@ -97,7 +97,7 @@ impl<'d, T: Instance> Adc<'d, T> {
Self {
adc,
sample_time: Default::default(),
sample_time: SampleTime::from_bits(0),
}
}
@ -107,13 +107,13 @@ impl<'d, T: Instance> Adc<'d, T> {
pub fn sample_time_for_us(&self, us: u32) -> SampleTime {
match us * Self::freq().0 / 1_000_000 {
0..=1 => SampleTime::Cycles1_5,
2..=4 => SampleTime::Cycles4_5,
5..=7 => SampleTime::Cycles7_5,
8..=19 => SampleTime::Cycles19_5,
20..=61 => SampleTime::Cycles61_5,
62..=181 => SampleTime::Cycles181_5,
_ => SampleTime::Cycles601_5,
0..=1 => SampleTime::CYCLES1_5,
2..=4 => SampleTime::CYCLES4_5,
5..=7 => SampleTime::CYCLES7_5,
8..=19 => SampleTime::CYCLES19_5,
20..=61 => SampleTime::CYCLES61_5,
62..=181 => SampleTime::CYCLES181_5,
_ => SampleTime::CYCLES601_5,
}
}

51
embassy-stm32/src/adc/f3_v1_1.rs
View file

@ -107,12 +107,12 @@ impl Calibration {
/// Returns a calibrated voltage value as in microvolts (uV)
pub fn cal_uv(&self, raw: u16, resolution: super::Resolution) -> u32 {
(self.vdda_uv() / resolution.to_max_count()) * raw as u32
(self.vdda_uv() / super::resolution_to_max_count(resolution)) * raw as u32
}
/// Returns a calibrated voltage value as an f32
pub fn cal_f32(&self, raw: u16, resolution: super::Resolution) -> f32 {
raw as f32 * self.vdda_f32() / resolution.to_max_count() as f32
raw as f32 * self.vdda_f32() / super::resolution_to_max_count(resolution) as f32
}
}
@ -175,12 +175,7 @@ impl<'d, T: Instance> Adc<'d, T> {
}
pub fn resolution(&self) -> Resolution {
match T::regs().cr1().read().res() {
crate::pac::adc::vals::Res::TWELVEBIT => Resolution::TwelveBit,
crate::pac::adc::vals::Res::TENBIT => Resolution::TenBit,
crate::pac::adc::vals::Res::EIGHTBIT => Resolution::EightBit,
crate::pac::adc::vals::Res::SIXBIT => Resolution::SixBit,
}
T::regs().cr1().read().res()
}
pub fn enable_vref(&self) -> Vref<T> {
@ -359,23 +354,23 @@ impl<'d, T: Instance> Adc<'d, T> {
fn get_res_clks(res: Resolution) -> u32 {
match res {
Resolution::TwelveBit => 12,
Resolution::TenBit => 11,
Resolution::EightBit => 9,
Resolution::SixBit => 7,
Resolution::BITS12 => 12,
Resolution::BITS10 => 11,
Resolution::BITS8 => 9,
Resolution::BITS6 => 7,
}
}
fn get_sample_time_clks(sample_time: SampleTime) -> u32 {
match sample_time {
SampleTime::Cycles4 => 4,
SampleTime::Cycles9 => 9,
SampleTime::Cycles16 => 16,
SampleTime::Cycles24 => 24,
SampleTime::Cycles48 => 48,
SampleTime::Cycles96 => 96,
SampleTime::Cycles192 => 192,
SampleTime::Cycles384 => 384,
SampleTime::CYCLES4 => 4,
SampleTime::CYCLES9 => 9,
SampleTime::CYCLES16 => 16,
SampleTime::CYCLES24 => 24,
SampleTime::CYCLES48 => 48,
SampleTime::CYCLES96 => 96,
SampleTime::CYCLES192 => 192,
SampleTime::CYCLES384 => 384,
}
}
@ -384,14 +379,14 @@ impl<'d, T: Instance> Adc<'d, T> {
let us_clks = us * Self::freq().0 / 1_000_000;
let clks = us_clks.saturating_sub(res_clks);
match clks {
0..=4 => SampleTime::Cycles4,
5..=9 => SampleTime::Cycles9,
10..=16 => SampleTime::Cycles16,
17..=24 => SampleTime::Cycles24,
25..=48 => SampleTime::Cycles48,
49..=96 => SampleTime::Cycles96,
97..=192 => SampleTime::Cycles192,
193.. => SampleTime::Cycles384,
0..=4 => SampleTime::CYCLES4,
5..=9 => SampleTime::CYCLES9,
10..=16 => SampleTime::CYCLES16,
17..=24 => SampleTime::CYCLES24,
25..=48 => SampleTime::CYCLES48,
49..=96 => SampleTime::CYCLES96,
97..=192 => SampleTime::CYCLES192,
193.. => SampleTime::CYCLES384,
}
}

35
embassy-stm32/src/adc/mod.rs
View file

@ -14,18 +14,13 @@
#[cfg_attr(adc_v4, path = "v4.rs")]
mod _version;
#[cfg(not(any(adc_f1, adc_f3_v2)))]
mod resolution;
mod sample_time;
#[allow(unused)]
#[cfg(not(adc_f3_v2))]
pub use _version::*;
#[cfg(not(any(adc_f1, adc_f3, adc_f3_v2)))]
pub use resolution::Resolution;
#[cfg(not(adc_f3_v2))]
pub use sample_time::SampleTime;
#[cfg(not(any(adc_f1, adc_f3_v2)))]
pub use crate::pac::adc::vals::Res as Resolution;
pub use crate::pac::adc::vals::SampleTime;
use crate::peripherals;
/// Analog to Digital driver.
@ -137,3 +132,27 @@ macro_rules! impl_adc_pin {
}
};
}
/// Get the maximum reading value for this resolution.
///
/// This is `2**n - 1`.
#[cfg(not(any(adc_f1, adc_f3_v2)))]
pub const fn resolution_to_max_count(res: Resolution) -> u32 {
match res {
#[cfg(adc_v4)]
Resolution::BITS16 => (1 << 16) - 1,
#[cfg(adc_v4)]
Resolution::BITS14 => (1 << 14) - 1,
#[cfg(adc_v4)]
Resolution::BITS14V => (1 << 14) - 1,
#[cfg(adc_v4)]
Resolution::BITS12V => (1 << 12) - 1,
Resolution::BITS12 => (1 << 12) - 1,
Resolution::BITS10 => (1 << 10) - 1,
Resolution::BITS8 => (1 << 8) - 1,
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_l0, adc_g0, adc_f3, adc_f3_v1_1, adc_h5))]
Resolution::BITS6 => (1 << 6) - 1,
#[allow(unreachable_patterns)]
_ => core::unreachable!(),
}
}

72
embassy-stm32/src/adc/resolution.rs
View file

@ -1,72 +0,0 @@
/// ADC resolution
#[allow(missing_docs)]
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_l0, adc_g0, adc_f3, adc_f3_v1_1, adc_h5))]
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Resolution {
TwelveBit,
TenBit,
EightBit,
SixBit,
}
/// ADC resolution
#[allow(missing_docs)]
#[cfg(adc_v4)]
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Resolution {
SixteenBit,
FourteenBit,
TwelveBit,
TenBit,
EightBit,
}
impl Default for Resolution {
fn default() -> Self {
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_l0, adc_g0, adc_f3, adc_f3_v1_1, adc_h5))]
{
Self::TwelveBit
}
#[cfg(adc_v4)]
{
Self::SixteenBit
}
}
}
impl From<Resolution> for crate::pac::adc::vals::Res {
fn from(res: Resolution) -> crate::pac::adc::vals::Res {
match res {
#[cfg(adc_v4)]
Resolution::SixteenBit => crate::pac::adc::vals::Res::SIXTEENBIT,
#[cfg(adc_v4)]
Resolution::FourteenBit => crate::pac::adc::vals::Res::FOURTEENBITV,
Resolution::TwelveBit => crate::pac::adc::vals::Res::TWELVEBIT,
Resolution::TenBit => crate::pac::adc::vals::Res::TENBIT,
Resolution::EightBit => crate::pac::adc::vals::Res::EIGHTBIT,
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_l0, adc_g0, adc_f3, adc_f3_v1_1, adc_h5))]
Resolution::SixBit => crate::pac::adc::vals::Res::SIXBIT,
}
}
}
impl Resolution {
/// Get the maximum reading value for this resolution.
///
/// This is `2**n - 1`.
pub const fn to_max_count(&self) -> u32 {
match self {
#[cfg(adc_v4)]
Resolution::SixteenBit => (1 << 16) - 1,
#[cfg(adc_v4)]
Resolution::FourteenBit => (1 << 14) - 1,
Resolution::TwelveBit => (1 << 12) - 1,
Resolution::TenBit => (1 << 10) - 1,
Resolution::EightBit => (1 << 8) - 1,
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_l0, adc_g0, adc_f3, adc_f3_v1_1, adc_h5))]
Resolution::SixBit => (1 << 6) - 1,
}
}
}

148
embassy-stm32/src/adc/sample_time.rs
View file

@ -1,148 +0,0 @@
#[cfg(not(adc_f3_v2))]
macro_rules! impl_sample_time {
($default_doc:expr, $default:ident, ($(($doc:expr, $variant:ident, $pac_variant:ident)),*)) => {
#[doc = concat!("ADC sample time\n\nThe default setting is ", $default_doc, " ADC clock cycles.")]
#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum SampleTime {
$(
#[doc = concat!($doc, " ADC clock cycles.")]
$variant,
)*
}
impl From<SampleTime> for crate::pac::adc::vals::SampleTime {
fn from(sample_time: SampleTime) -> crate::pac::adc::vals::SampleTime {
match sample_time {
$(SampleTime::$variant => crate::pac::adc::vals::SampleTime::$pac_variant),*
}
}
}
impl From<crate::pac::adc::vals::SampleTime> for SampleTime {
fn from(sample_time: crate::pac::adc::vals::SampleTime) -> SampleTime {
match sample_time {
$(crate::pac::adc::vals::SampleTime::$pac_variant => SampleTime::$variant),*
}
}
}
impl Default for SampleTime {
fn default() -> Self {
Self::$default
}
}
};
}
#[cfg(any(adc_f1, adc_v1))]
impl_sample_time!(
"1.5",
Cycles1_5,
(
("1.5", Cycles1_5, CYCLES1_5),
("7.5", Cycles7_5, CYCLES7_5),
("13.5", Cycles13_5, CYCLES13_5),
("28.5", Cycles28_5, CYCLES28_5),
("41.5", Cycles41_5, CYCLES41_5),
("55.5", Cycles55_5, CYCLES55_5),
("71.5", Cycles71_5, CYCLES71_5),
("239.5", Cycles239_5, CYCLES239_5)
)
);
#[cfg(adc_v2)]
impl_sample_time!(
"3",
Cycles3,
(
("3", Cycles3, CYCLES3),
("15", Cycles15, CYCLES15),
("28", Cycles28, CYCLES28),
("56", Cycles56, CYCLES56),
("84", Cycles84, CYCLES84),
("112", Cycles112, CYCLES112),
("144", Cycles144, CYCLES144),
("480", Cycles480, CYCLES480)
)
);
#[cfg(any(adc_v3, adc_h5))]
impl_sample_time!(
"2.5",
Cycles2_5,
(
("2.5", Cycles2_5, CYCLES2_5),
("6.5", Cycles6_5, CYCLES6_5),
("12.5", Cycles12_5, CYCLES12_5),
("24.5", Cycles24_5, CYCLES24_5),
("47.5", Cycles47_5, CYCLES47_5),
("92.5", Cycles92_5, CYCLES92_5),
("247.5", Cycles247_5, CYCLES247_5),
("640.5", Cycles640_5, CYCLES640_5)
)
);
#[cfg(any(adc_l0, adc_g0))]
impl_sample_time!(
"1.5",
Cycles1_5,
(
("1.5", Cycles1_5, CYCLES1_5),
("3.5", Cycles3_5, CYCLES3_5),
("7.5", Cycles7_5, CYCLES7_5),
("12.5", Cycles12_5, CYCLES12_5),
("19.5", Cycles19_5, CYCLES19_5),
("39.5", Cycles39_5, CYCLES39_5),
("79.5", Cycles79_5, CYCLES79_5),
("160.5", Cycles160_5, CYCLES160_5)
)
);
#[cfg(adc_v4)]
impl_sample_time!(
"1.5",
Cycles1_5,
(
("1.5", Cycles1_5, CYCLES1_5),
("2.5", Cycles2_5, CYCLES2_5),
("8.5", Cycles8_5, CYCLES8_5),
("16.5", Cycles16_5, CYCLES16_5),
("32.5", Cycles32_5, CYCLES32_5),
("64.5", Cycles64_5, CYCLES64_5),
("387.5", Cycles387_5, CYCLES387_5),
("810.5", Cycles810_5, CYCLES810_5)
)
);
#[cfg(adc_f3)]
impl_sample_time!(
"1.5",
Cycles1_5,
(
("1.5", Cycles1_5, CYCLES1_5),
("2.5", Cycles2_5, CYCLES2_5),
("4.5", Cycles4_5, CYCLES4_5),
("7.5", Cycles7_5, CYCLES7_5),
("19.5", Cycles19_5, CYCLES19_5),
("61.5", Cycles61_5, CYCLES61_5),
("181.5", Cycles181_5, CYCLES181_5),
("601.5", Cycles601_5, CYCLES601_5)
)
);
#[cfg(any(adc_f3_v1_1))]
impl_sample_time!(
"4",
Cycles4,
(
("4", Cycles4, CYCLES4),
("9", Cycles9, CYCLES9),
("16", Cycles16, CYCLES16),
("24", Cycles24, CYCLES24),
("48", Cycles48, CYCLES48),
("96", Cycles96, CYCLES96),
("192", Cycles192, CYCLES192),
("384", Cycles384, CYCLES384)
)
);

2
embassy-stm32/src/adc/v1.rs
View file

@ -109,7 +109,7 @@ impl<'d, T: Instance> Adc<'d, T> {
Self {
adc,
sample_time: Default::default(),
sample_time: SampleTime::from_bits(0),
}
}

2
embassy-stm32/src/adc/v2.rs
View file

@ -111,7 +111,7 @@ where
Self {
adc,
sample_time: Default::default(),
sample_time: SampleTime::from_bits(0),
}
}

6
embassy-stm32/src/adc/v3.rs
View file

@ -102,7 +102,7 @@ impl<'d, T: Instance> Adc<'d, T> {
Self {
adc,
sample_time: Default::default(),
sample_time: SampleTime::from_bits(0),
}
}
@ -259,8 +259,8 @@ impl<'d, T: Instance> Adc<'d, T> {
} else {
let sample_time = sample_time.into();
T::regs()
.smpr(ch as usize / 10)
.modify(|reg| reg.set_smp(ch as usize % 10, sample_time));
.smpr(_ch as usize / 10)
.modify(|reg| reg.set_smp(_ch as usize % 10, sample_time));
}
}
}

2
embassy-stm32/src/adc/v4.rs
View file

@ -159,7 +159,7 @@ impl<'d, T: Instance> Adc<'d, T> {
}
let mut s = Self {
adc,
sample_time: Default::default(),
sample_time: SampleTime::from_bits(0),
};
s.power_up(delay);
s.configure_differential_inputs();

2
examples/stm32f0/src/bin/adc.rs
View file

@ -19,7 +19,7 @@ async fn main(_spawner: Spawner) {
info!("Hello World!");
let mut adc = Adc::new(p.ADC, Irqs, &mut Delay);
adc.set_sample_time(SampleTime::Cycles71_5);
adc.set_sample_time(SampleTime::CYCLES71_5);
let mut pin = p.PA1;
let mut vrefint = adc.enable_vref(&mut Delay);

2
examples/stm32f334/src/bin/adc.rs
View file

@ -40,7 +40,7 @@ async fn main(_spawner: Spawner) -> ! {
let mut adc = Adc::new(p.ADC1, Irqs, &mut Delay);
adc.set_sample_time(SampleTime::Cycles601_5);
adc.set_sample_time(SampleTime::CYCLES601_5);
info!("enable vrefint...");

2
examples/stm32f334/src/bin/opamp.rs
View file

@ -42,7 +42,7 @@ async fn main(_spawner: Spawner) -> ! {
let mut adc = Adc::new(p.ADC2, Irqs, &mut Delay);
let mut opamp = OpAmp::new(p.OPAMP2);
adc.set_sample_time(SampleTime::Cycles601_5);
adc.set_sample_time(SampleTime::CYCLES601_5);
info!("enable vrefint...");

2
examples/stm32g4/src/bin/adc.rs
View file

@ -30,7 +30,7 @@ async fn main(_spawner: Spawner) {
info!("Hello World!");
let mut adc = Adc::new(p.ADC2, &mut Delay);
adc.set_sample_time(SampleTime::Cycles32_5);
adc.set_sample_time(SampleTime::CYCLES32_5);
loop {
let measured = adc.read(&mut p.PA7);

2
examples/stm32h7/src/bin/adc.rs
View file

@ -46,7 +46,7 @@ async fn main(_spawner: Spawner) {
let mut adc = Adc::new(p.ADC3, &mut Delay);
adc.set_sample_time(SampleTime::Cycles32_5);
adc.set_sample_time(SampleTime::CYCLES32_5);
let mut vrefint_channel = adc.enable_vrefint();

2
examples/stm32l0/src/bin/adc.rs
View file

@ -19,7 +19,7 @@ async fn main(_spawner: Spawner) {
info!("Hello World!");
let mut adc = Adc::new(p.ADC, Irqs, &mut Delay);
adc.set_sample_time(SampleTime::Cycles79_5);
adc.set_sample_time(SampleTime::CYCLES79_5);
let mut pin = p.PA1;
let mut vrefint = adc.enable_vref(&mut Delay);

2
examples/stm32l4/src/bin/adc.rs
View file

@ -20,7 +20,7 @@ fn main() -> ! {
let mut adc = Adc::new(p.ADC1, &mut Delay);
//adc.enable_vref();
adc.set_resolution(Resolution::EightBit);
adc.set_resolution(Resolution::BITS8);
let mut channel = p.PC0;
loop {