NaxdyOrg/embassy
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Add set_txdmaen and set_rxdmaen functions

Browse source
This commit is contained in:
Grant Miller 2022-03-14 15:25:20 -05:00
parent 444b37fcdf
commit 7cd6f00a90
4 changed files with 41 additions and 45 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

26
embassy-stm32/src/spi/mod.rs
View file

@ -627,6 +627,32 @@ fn flush_rx_fifo(regs: Regs) {
} }
} }
fn set_txdmaen(regs: Regs, val: bool) {
unsafe {
#[cfg(not(spi_v3))]
regs.cr2().modify(|reg| {
reg.set_txdmaen(val);
});
#[cfg(spi_v3)]
regs.cfg1().modify(|reg| {
reg.set_txdmaen(val);
});
}
}
fn set_rxdmaen(regs: Regs, val: bool) {
unsafe {
#[cfg(not(spi_v3))]
regs.cr2().modify(|reg| {
reg.set_rxdmaen(val);
});
#[cfg(spi_v3)]
regs.cfg1().modify(|reg| {
reg.set_rxdmaen(val);
});
}
}
fn finish_dma(regs: Regs) { fn finish_dma(regs: Regs) {
spin_until_idle(regs); spin_until_idle(regs);

20
embassy-stm32/src/spi/v1.rs
View file

@ -27,9 +27,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
let tx_f = Transfer::new(&mut self.txdma); let tx_f = Transfer::new(&mut self.txdma);
unsafe { unsafe {
T::regs().cr2().modify(|reg| { set_txdmaen(T::regs(), true);
reg.set_txdmaen(true);
});
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(true); w.set_spe(true);
}); });
@ -52,9 +50,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(false); w.set_spe(false);
}); });
T::regs().cr2().modify(|reg| { set_rxdmaen(T::regs(), true);
reg.set_rxdmaen(true);
});
} }
let (_, clock_byte_count) = slice_ptr_parts_mut(read); let (_, clock_byte_count) = slice_ptr_parts_mut(read);
@ -76,9 +72,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
); );
unsafe { unsafe {
T::regs().cr2().modify(|reg| { set_txdmaen(T::regs(), true);
reg.set_txdmaen(true);
});
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(true); w.set_spe(true);
}); });
@ -109,9 +103,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(false); w.set_spe(false);
}); });
T::regs().cr2().modify(|reg| { set_rxdmaen(T::regs(), true);
reg.set_rxdmaen(true);
});
} }
// TODO: This is unnecessary in some versions because // TODO: This is unnecessary in some versions because
@ -129,9 +121,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
let tx_f = Transfer::new(&mut self.txdma); let tx_f = Transfer::new(&mut self.txdma);
unsafe { unsafe {
T::regs().cr2().modify(|reg| { set_txdmaen(T::regs(), true);
reg.set_txdmaen(true);
});
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(true); w.set_spe(true);
}); });

20
embassy-stm32/src/spi/v2.rs
View file

@ -27,9 +27,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
let tx_f = Transfer::new(&mut self.txdma); let tx_f = Transfer::new(&mut self.txdma);
unsafe { unsafe {
T::regs().cr2().modify(|reg| { set_txdmaen(T::regs(), true);
reg.set_txdmaen(true);
});
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(true); w.set_spe(true);
}); });
@ -52,9 +50,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(false); w.set_spe(false);
}); });
T::regs().cr2().modify(|reg| { set_rxdmaen(T::regs(), true);
reg.set_rxdmaen(true);
});
} }
let (_, clock_byte_count) = slice_ptr_parts_mut(read); let (_, clock_byte_count) = slice_ptr_parts_mut(read);
@ -76,9 +72,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
); );
unsafe { unsafe {
T::regs().cr2().modify(|reg| { set_txdmaen(T::regs(), true);
reg.set_txdmaen(true);
});
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(true); w.set_spe(true);
}); });
@ -109,9 +103,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(false); w.set_spe(false);
}); });
T::regs().cr2().modify(|reg| { set_rxdmaen(T::regs(), true);
reg.set_rxdmaen(true);
});
} }
// TODO: This is unnecessary in some versions because // TODO: This is unnecessary in some versions because
@ -129,9 +121,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
let tx_f = Transfer::new(&mut self.txdma); let tx_f = Transfer::new(&mut self.txdma);
unsafe { unsafe {
T::regs().cr2().modify(|reg| { set_txdmaen(T::regs(), true);
reg.set_txdmaen(true);
});
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(true); w.set_spe(true);
}); });

20
embassy-stm32/src/spi/v3.rs
View file

@ -27,9 +27,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
let tx_f = Transfer::new(&mut self.txdma); let tx_f = Transfer::new(&mut self.txdma);
unsafe { unsafe {
T::regs().cfg1().modify(|reg| { set_txdmaen(T::regs(), true);
reg.set_txdmaen(true);
});
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(true); w.set_spe(true);
}); });
@ -55,9 +53,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(false); w.set_spe(false);
}); });
T::regs().cfg1().modify(|reg| { set_rxdmaen(T::regs(), true);
reg.set_rxdmaen(true);
});
} }
let (_, clock_byte_count) = slice_ptr_parts_mut(read); let (_, clock_byte_count) = slice_ptr_parts_mut(read);
@ -79,9 +75,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
); );
unsafe { unsafe {
T::regs().cfg1().modify(|reg| { set_txdmaen(T::regs(), true);
reg.set_txdmaen(true);
});
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(true); w.set_spe(true);
}); });
@ -115,9 +109,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(false); w.set_spe(false);
}); });
T::regs().cfg1().modify(|reg| { set_rxdmaen(T::regs(), true);
reg.set_rxdmaen(true);
});
} }
// TODO: This is unnecessary in some versions because // TODO: This is unnecessary in some versions because
@ -135,9 +127,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
let tx_f = Transfer::new(&mut self.txdma); let tx_f = Transfer::new(&mut self.txdma);
unsafe { unsafe {
T::regs().cfg1().modify(|reg| { set_txdmaen(T::regs(), true);
reg.set_txdmaen(true);
});
T::regs().cr1().modify(|w| { T::regs().cr1().modify(|w| {
w.set_spe(true); w.set_spe(true);
}); });