Merge pull request #1595 from embassy-rs/probe-rs

Update probe-rs-cli -> probe-rs
This commit is contained in:
Dario Nieuwenhuis 2023-06-29 00:43:44 +00:00 committed by GitHub
commit b95e5a4ea6
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
45 changed files with 88 additions and 88 deletions

View file

@ -6,16 +6,16 @@
"rust-analyzer.check.allTargets": false,
"rust-analyzer.check.noDefaultFeatures": true,
"rust-analyzer.cargo.noDefaultFeatures": true,
"rust-analyzer.cargo.target": "thumbv7em-none-eabi",
"rust-analyzer.cargo.target": "thumbv7m-none-eabi",
//"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf",
"rust-analyzer.cargo.features": [
"nightly",
///"nightly",
],
"rust-analyzer.linkedProjects": [
// Declare for the target you wish to develop
// "embassy-executor/Cargo.toml",
// "embassy-sync/Cargo.toml",
"examples/nrf52840/Cargo.toml",
"examples/stm32wl/Cargo.toml",
// "examples/nrf5340/Cargo.toml",
// "examples/nrf-rtos-trace/Cargo.toml",
// "examples/rp/Cargo.toml",

View file

@ -1,6 +1,6 @@
# cyw43
WIP driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. Implementation based on [Infineon/wifi-host-driver](https://github.com/Infineon/wifi-host-driver).
Rust driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. Implementation based on [Infineon/wifi-host-driver](https://github.com/Infineon/wifi-host-driver).
## Current status
@ -19,18 +19,18 @@ Working:
TODO:
- Setting a custom MAC address.
- Bus sleep (unclear what the benefit is. Is it needed for IRQs? or is it just power consumption optimization?)
- Bus sleep (for power consumption optimization)
## Running the examples
- `cargo install probe-rs-cli`
- `cd examples/rpi-pico-w`
- `cargo install probe-rs --features cli`
- `cd examples/rp`
### Example 1: Scan the wifi stations
- `cargo run --release --bin wifi_scan`
### Example 2: Create an access point (IP and credentials in the code)
- `cargo run --release --bin tcp_server_ap`
- `cargo run --release --bin wifi_ap_tcp_server`
### Example 3: Connect to an existing network and create a server
- `WIFI_NETWORK=MyWifiNetwork WIFI_PASSWORD=MyWifiPassword cargo run --release`
- `WIFI_NETWORK=MyWifiNetwork WIFI_PASSWORD=MyWifiPassword cargo run --release --bin wifi_tcp_server`
After a few seconds, you should see that DHCP picks up an IP address like this
```

View file

@ -410,13 +410,13 @@ pub fn init(config: config::Config) -> Peripherals {
warn!(
"You have requested enabling chip reset functionality on the reset pin, by not enabling the Cargo feature `reset-pin-as-gpio`.\n\
However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\
To fix this, erase UICR manually, for example using `probe-rs-cli erase` or `nrfjprog --eraseuicr`."
To fix this, erase UICR manually, for example using `probe-rs erase` or `nrfjprog --eraseuicr`."
);
#[cfg(feature = "reset-pin-as-gpio")]
warn!(
"You have requested using the reset pin as GPIO, by enabling the Cargo feature `reset-pin-as-gpio`.\n\
However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\
To fix this, erase UICR manually, for example using `probe-rs-cli erase` or `nrfjprog --eraseuicr`."
To fix this, erase UICR manually, for example using `probe-rs erase` or `nrfjprog --eraseuicr`."
);
}
}
@ -432,7 +432,7 @@ pub fn init(config: config::Config) -> Peripherals {
warn!(
"You have requested to use P0.09 and P0.10 pins for NFC, by not enabling the Cargo feature `nfc-pins-as-gpio`.\n\
However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\
To fix this, erase UICR manually, for example using `probe-rs-cli erase` or `nrfjprog --eraseuicr`."
To fix this, erase UICR manually, for example using `probe-rs erase` or `nrfjprog --eraseuicr`."
);
}
}

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip nRF52840_xxAA"
# replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip nRF52840_xxAA"
[build]
target = "thumbv7em-none-eabi"

View file

@ -3,7 +3,7 @@ build-std = ["core"]
build-std-features = ["panic_immediate_abort"]
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
runner = "probe-rs-cli run --chip RP2040"
runner = "probe-rs run --chip RP2040"
[build]
target = "thumbv6m-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32F303VCTx"
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32F303VCTx"
[build]
target = "thumbv7em-none-eabihf"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32F767ZITx"
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32F767ZITx"
[build]
target = "thumbv7em-none-eabihf"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32H743ZITx"
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32H743ZITx"
[build]
target = "thumbv7em-none-eabihf"

View file

@ -1,5 +1,5 @@
#!/bin/bash
probe-rs-cli erase --chip STM32H743ZITx
probe-rs erase --chip STM32H743ZITx
mv ../../bootloader/stm32/memory.x ../../bootloader/stm32/memory-old.x
cp memory-bl.x ../../bootloader/stm32/memory.x

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32L072CZTx"
# replace your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32L072CZTx"
[build]
target = "thumbv6m-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32L151CBxxA"
# replace your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32L151CBxxA"
[build]
target = "thumbv7m-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32L475VG"
# replace your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32L475VG"
[build]
target = "thumbv7em-none-eabihf"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32WLE5JCIx"
# replace your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32WLE5JCIx"
[build]
target = "thumbv7em-none-eabihf"

View file

@ -4,7 +4,7 @@ build-std-features = ["panic_immediate_abort"]
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
#runner = "./fruitrunner"
runner = "probe-rs-cli run --chip nrf52840_xxAA"
runner = "probe-rs run --chip nrf52840_xxAA"
rustflags = [
# Code-size optimizations.

View file

@ -1,5 +1,5 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
runner = "probe-rs-cli run --chip RP2040"
runner = "probe-rs run --chip RP2040"
[build]
target = "thumbv6m-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip nRF52840_xxAA"
# replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip nRF52840_xxAA"
[build]
target = "thumbv7em-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip nRF52840_xxAA"
# replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip nRF52840_xxAA"
[build]
target = "thumbv7em-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip nRF52840_xxAA"
# replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip nRF52840_xxAA"
[build]
target = "thumbv7em-none-eabi"

View file

@ -14,7 +14,7 @@ async fn main(_spawner: Spawner) {
let p = embassy_nrf::init(Default::default());
info!("Hello NVMC!");
// probe-rs-cli run breaks without this, I'm not sure why.
// probe-rs run breaks without this, I'm not sure why.
Timer::after(Duration::from_secs(1)).await;
let mut f = Nvmc::new(p.NVMC);

View file

@ -16,7 +16,7 @@ async fn main(_spawner: Spawner) {
let mut config = Config::default();
config.timeout_ticks = 32768 * 3; // 3 seconds
// This is needed for `probe-rs-cli run` to be able to catch the panic message
// This is needed for `probe-rs run` to be able to catch the panic message
// in the WDT interrupt. The core resets 2 ticks after firing the interrupt.
config.run_during_debug_halt = false;

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace nRF5340_xxAA with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip nRF5340_xxAA"
# replace nRF5340_xxAA with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip nRF5340_xxAA"
[build]
target = "thumbv8m.main-none-eabihf"

View file

@ -1,5 +1,5 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
runner = "probe-rs-cli run --chip RP2040"
runner = "probe-rs run --chip RP2040"
[build]
target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+

View file

@ -42,8 +42,8 @@ async fn main(spawner: Spawner) {
// To make flashing faster for development, you may want to flash the firmwares independently
// at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
// probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };

View file

@ -27,8 +27,8 @@ async fn main(spawner: Spawner) {
// To make flashing faster for development, you may want to flash the firmwares independently
// at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
// probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };

View file

@ -39,8 +39,8 @@ async fn main(spawner: Spawner) {
// To make flashing faster for development, you may want to flash the firmwares independently
// at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
// probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };

View file

@ -42,8 +42,8 @@ async fn main(spawner: Spawner) {
// To make flashing faster for development, you may want to flash the firmwares independently
// at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
// probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
// probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32G071C8Rx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --speed 100 --chip STM32c031c6tx"
# replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --speed 100 --chip STM32c031c6tx"
[build]
target = "thumbv6m-none-eabi"

View file

@ -1,5 +1,5 @@
[target.thumbv6m-none-eabi]
runner = 'probe-rs-cli run --chip STM32F091RCTX'
runner = 'probe-rs run --chip STM32F091RCTX'
[build]
target = "thumbv6m-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F103C8 with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32F103C8"
# replace STM32F103C8 with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32F103C8"
[build]
target = "thumbv7m-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F207ZGTx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32F207ZGTx"
# replace STM32F207ZGTx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32F207ZGTx"
[build]
target = "thumbv7m-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32F303ZETx"
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32F303ZETx"
[build]
target = "thumbv7em-none-eabihf"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32F429ZITx"
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32F429ZITx"
[build]
target = "thumbv7em-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32F767ZITx"
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32F767ZITx"
[build]
target = "thumbv7em-none-eabihf"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32G071C8Rx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32G071RBTx"
# replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32G071RBTx"
[build]
target = "thumbv6m-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32G071C8Rx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32G484VETx"
# replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32G484VETx"
[build]
target = "thumbv7em-none-eabi"

View file

@ -1,5 +1,5 @@
[target.thumbv8m.main-none-eabihf]
runner = 'probe-rs-cli run --chip STM32H563ZITx'
runner = 'probe-rs run --chip STM32H563ZITx'
[build]
target = "thumbv8m.main-none-eabihf"

View file

@ -1,5 +1,5 @@
[target.thumbv7em-none-eabihf]
runner = 'probe-rs-cli run --chip STM32H743ZITx'
runner = 'probe-rs run --chip STM32H743ZITx'
[build]
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32L053R8Tx"
# replace your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32L053R8Tx"
[build]
target = "thumbv6m-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32L151CBxxA"
# replace your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32L151CBxxA"
[build]
target = "thumbv7m-none-eabi"

View file

@ -1,8 +1,8 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
#runner = "probe-rs-cli run --chip STM32L475VGT6"
#runner = "probe-rs-cli run --chip STM32L475VG"
runner = "probe-rs-cli run --chip STM32L4S5VI"
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
#runner = "probe-rs run --chip STM32L475VGT6"
#runner = "probe-rs run --chip STM32L475VG"
runner = "probe-rs run --chip STM32L4S5VI"
[build]
target = "thumbv7em-none-eabi"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32L552ZETxQ with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32L552ZETxQ"
# replace STM32L552ZETxQ with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32L552ZETxQ"
[build]
target = "thumbv8m.main-none-eabihf"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32U585AIIx with your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32U585AIIx"
# replace STM32U585AIIx with your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32U585AIIx"
[build]
target = "thumbv8m.main-none-eabihf"

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32WB55CCUx with your chip as listed in `probe-rs-cli chip list`
# runner = "probe-rs-cli run --chip STM32WB55RGVx --speed 1000 --connect-under-reset"
# replace STM32WB55CCUx with your chip as listed in `probe-rs chip list`
# runner = "probe-rs run --chip STM32WB55RGVx --speed 1000 --connect-under-reset"
runner = "teleprobe local run --chip STM32WB55RG --elf"
[build]

View file

@ -1,6 +1,6 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace your chip as listed in `probe-rs-cli chip list`
runner = "probe-rs-cli run --chip STM32WLE5JCIx"
# replace your chip as listed in `probe-rs chip list`
runner = "probe-rs run --chip STM32WLE5JCIx"
[build]
target = "thumbv7em-none-eabihf"

View file

@ -44,8 +44,8 @@ async fn main(spawner: Spawner) {
}
// cyw43 firmware needs to be flashed manually:
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x101c0000
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x101f8000
// probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x101c0000
// probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x101f8000
let fw = unsafe { core::slice::from_raw_parts(0x101c0000 as *const u8, 224190) };
let clm = unsafe { core::slice::from_raw_parts(0x101f8000 as *const u8, 4752) };