Joshua Salzedo
ab60cfd64b
Patch additional regressions
2021-09-27 15:48:56 -07:00
Joshua Salzedo
67e2f9159c
set moder::ALTERNATE last when configuring pins to AF modes.
...
- as per STM32F4xx_hal's impl
2021-09-27 15:27:43 -07:00
Joshua Salzedo
07e20a7443
Pub use version-specific CRC symbols, not just the CRC struct.
2021-09-27 11:17:31 -07:00
Joshua Salzedo
a26ffeb84b
Cargo fmt
2021-09-27 10:49:32 -07:00
Joshua Salzedo
e36d4f460a
Fix variable names in crc_v2/v3.
...
removed `reclaim` in crc_v1.
used write instead of modify.
renamed `init` to `reset` in crc_v1.
2021-09-27 10:46:09 -07:00
Joshua Salzedo
43ad28b9f9
Use unborrow for CRC constructor
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sort feature gates
fix repetition in CRC config names
2021-09-27 10:38:55 -07:00
Joshua Salzedo
7392e33ad5
cargo fmt
2021-09-26 19:20:21 -07:00
Joshua Salzedo
e67af514e9
Fix v2/3 module paths
2021-09-26 19:15:54 -07:00
Joshua Salzedo
642b0825a6
V3 is just an extension of V2, merge modules.
2021-09-26 19:14:08 -07:00
Joshua Salzedo
f9ff5336d4
Merge all of the crc_v2 configurations into a single modify call
2021-09-26 18:46:19 -07:00
Joshua Salzedo
8fac444c4e
Flesh out v2 config writes
2021-09-26 18:39:55 -07:00
Joshua Salzedo
afef19d813
Start work towards CRC_V2
2021-09-26 18:26:20 -07:00
Joshua Salzedo
7899d73359
Expose read so the value can be obtained without a write.
2021-09-26 17:28:58 -07:00
Joshua Salzedo
c892289b2c
Actually export CRC
2021-09-26 17:26:33 -07:00
Joshua Salzedo
24dea91f5a
Fix interface changes
2021-09-26 17:24:48 -07:00
Joshua Salzedo
e18a27eea2
First pass at CRC_V1
2021-09-26 16:46:17 -07:00
Joshua Salzedo
e527892d89
Start work on CRC_v1
2021-09-26 16:29:22 -07:00
Dario Nieuwenhuis
f8d833e0c5
Merge pull request #403 from mryndzionek/af_type
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Small adjustment to 'set_as_af' interface
2021-09-24 20:20:45 +02:00
Mariusz Ryndzionek
e4b37c40c9
Code review request - moving OutputType to mod sealed
2021-09-24 19:56:48 +02:00
Mariusz Ryndzionek
d371298a27
Small adjustment to 'set_as_af' interface
...
Small adjustment to 'set_as_af' interface - v2
2021-09-24 18:39:07 +02:00
Vincent Stakenburg
7d6d274d55
Add MSI and PLL clock source for L4
2021-09-24 18:27:39 +02:00
Ulf Lilleengen
b6fc19182b
Add pwr for L1 and update RCC to new reg block
2021-09-23 14:51:16 +02:00
Ulf Lilleengen
9d45018077
Refactor V1 SPI
2021-09-21 14:50:23 +02:00
Ulf Lilleengen
c79485c286
Support for STM32L1
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* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
Ulf Lilleengen
fb697a2657
Updates
2021-09-15 12:46:20 +02:00
Dario Nieuwenhuis
bb72f7eb98
Merge pull request #390 from lulf/wasm-executor
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Wasm executor support
2021-09-13 18:55:17 +02:00
Ulf Lilleengen
99a94f1d50
Update version of critical-section
2021-09-13 17:05:17 +02:00
Dario Nieuwenhuis
d6faf69e09
Merge pull request #378 from numero-744/gen-features-using-rust-not-python
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Use our beloved Rust instead of Python
2021-09-13 16:47:01 +02:00
Ulf Lilleengen
e24528051b
Add WASM support for executor
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* Adds an executor for WASM runtimes based on wasm_bindgen.
* Add time driver based on JS time handling.
* Add example that can run in browser locally.
* Update to critical-section version that supports 'std' flag
2021-09-13 16:42:39 +02:00
Côme ALLART
99ccf18160
fix(gen-features): keep data files order
2021-09-11 20:04:57 +02:00
Dario Nieuwenhuis
ead987245d
embassy: Refactor module structure to remove kitchen-sink util.
2021-09-11 02:35:35 +02:00
Dario Nieuwenhuis
f2623e7e9b
Update lots of deps
2021-09-11 01:35:23 +02:00
Adam Greig
14fa6c2760
STM32H7: Ethernet: Disable RA in MAC filtering, fix order of MACA0 register writes.
2021-09-06 23:16:43 +01:00
Bob McWhirter
d4bf78a0c1
Don't set SAF=true, do set RA=true for Ethernet.
...
Source-Address-Filtering is not helping the board to receive packets.
For unknown reasons, the Receive-All is required, when in theory
it should not be required. Until we figure it out, follow the
stm32h7xx-hal example of setting RA=true.
2021-09-06 14:21:26 -04:00
Dario Nieuwenhuis
eff8ae9c4d
Merge pull request #381 from lulf/stm32wl55-subghz
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Add HAL for SubGhz peripheral for STM32 WL series
2021-09-06 00:58:42 +02:00
Dario Nieuwenhuis
de016e8456
Remove trait_alias, allow(incomplete_features).
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trait_alias seems unused. no idea why it's there.
2021-09-03 17:00:58 +02:00
Ulf Lilleengen
0f3d278ce3
Temporarily comment unused code
2021-09-02 11:31:38 +02:00
Ulf Lilleengen
4dccda085f
Add missing files for G0
2021-09-02 11:19:54 +02:00
Ulf Lilleengen
f175574bcf
Cargo fmt
2021-09-02 10:43:08 +02:00
Ulf Lilleengen
16aa1d1770
ADd missing file
2021-09-02 10:42:11 +02:00
Ulf Lilleengen
7ad6280e65
Add HAL for SubGhz peripheral for STM32 WL series
...
Based on the HAL from stm32wl, the peripheral driver has been
modified to fit into embassy, using the embassy APIs, providing
operation of the radio peripheral.
The initial version does not offer any async APIs, but the example
shows how the radio IRQ can be used to perform async TX of the radio.
2021-09-02 10:39:56 +02:00
Bob McWhirter
37ceae908b
Rename Random impl to Rng.
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Create Random struct providing next_x(range) for all T:Rng.
2021-09-01 09:39:33 -04:00
Bob McWhirter
7fa3b27cac
Move random utils to another trait.
2021-08-30 09:55:29 -04:00
Bob McWhirter
d525f51940
Add a convenience next(range) to Rng.
2021-08-27 16:10:01 -04:00
Côme ALLART
022b809248
refactor(gen_features): use Rust instead of Python
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Done for /embassy-stm32 only
The new generator is in /stm32-gen-features
/stm32-metapac could/should be added too
A CI check "generated features up to date" could/should be performed
2021-08-27 11:09:27 +02:00
Dario Nieuwenhuis
e56c6166dc
Merge pull request #373 from embassy-rs/docs
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Time driver improvements, docs.
2021-08-26 23:37:37 +02:00
Bob McWhirter
dc394dd477
Fixes #374 : Ensure Rng's error is defmt-able.
2021-08-26 14:04:12 -04:00
numero-744
1098072384
build(stm32): remove gen.py build dependency
2021-08-26 18:59:37 +02:00
Dario Nieuwenhuis
7c0990ad1e
time: allow storing state inside the driver struct.
2021-08-25 21:06:27 +02:00
Bob McWhirter
4aa52f1b9e
Formatting.
2021-08-24 14:56:45 -04:00
