Commit graph

52 commits

Author SHA1 Message Date
xoviat
13f6c47a88 impl. stm32f405 2021-03-04 17:27:46 -06:00
xoviat
9bcb0c36dc implement generics on serial 2021-03-04 17:20:35 -06:00
xoviat
9626aee7db Move traits to separate crate. 2021-03-02 00:32:23 +01:00
Dario Nieuwenhuis
45355f184a move most interrupt methods to InterruptExt extension trait. Fixes #35 2021-03-01 00:44:38 +01:00
Dario Nieuwenhuis
da91779117 interrupt: Split set_handler context.
Since introducing the ctx pointer, the handler is now two words, so setting it can
race with the interrupt firing. On race it's possible for the new handler to be
alled with the old ctx pointer or viceversa.

Rather than documenting this, it's better to split the function in two to make it
obvious to the user that it's not atomic. The user can use a critical section, or
disable/enable the interrupt to avoid races if this is a concern.
2021-02-26 02:04:48 +01:00
Dario Nieuwenhuis
11be9170ec Cleanup interrupt package naming. Fixes #40
The `interrupt` package previously tried to be drop-in compatible with the
`interrupt` package from PACs. THis meant that there was both a PAC-style enum
value `UARTE0` and an embassy-style owned `UARTE0Interrupt` type. This made
things VERY confusing.

This drops compatibility with the PAC, improving the names for embassy interrupts.
2021-02-26 01:55:27 +01:00
Dario Nieuwenhuis
90476ef900 Fix some warnings. 2021-02-26 01:06:58 +01:00
Dario Nieuwenhuis
de796d3e80
Merge pull request #53 from fnafnio/defmt-update
update defmt and defmt-rtt to 0.2.0
2021-02-26 00:30:00 +01:00
xoviat
582fe34dcc stm32f4: exti: clear interrupt pending bit
bit should be cleared when created
2021-02-24 09:36:49 -06:00
fnafnio
f779ec4928 update defmt and defmt-rtt to 0.2.0 2021-02-24 08:44:23 +01:00
Thales Fragoso
e16e3780fd Add missing interrupts for stm32f4 2021-02-17 19:41:23 -03:00
Thales Fragoso
fc7977bd9a Add remaining stm32f4 timers 2021-02-17 19:41:00 -03:00
Thales Fragoso
9d895a6383 Add RTC timer for stm32f4 2021-02-17 19:40:27 -03:00
Dario Nieuwenhuis
7321ddb0b3 Update to cortex-m 0.7 2021-02-14 23:26:50 +01:00
Thales Fragoso
b69f72e055 Get rid of some warnings 2021-02-13 21:41:36 -03:00
Dario Nieuwenhuis
9240a1f437 stm32: add stm32f411 interrupts 2021-01-21 18:59:56 +01:00
Dario Nieuwenhuis
dd47bfbc2e stm32f4: Remove stm32f405 being default feature 2021-01-21 18:59:11 +01:00
xoviat
27cd3a03dc exti: add new ExtiPin driver 2021-01-21 11:08:38 -06:00
xoviat
2b15a2674f minor cleanup to interface 2021-01-14 11:42:23 -06:00
xoviat
7adf99eff3 implement changes 2021-01-13 17:40:32 -06:00
xoviat
a168b9ef51 restrict unsafe block 2021-01-06 21:02:02 -06:00
xoviat
31ba052f14 mark new unsafe 2021-01-06 14:31:43 -06:00
xoviat
1c3b7541cb use transmute for now 2021-01-06 14:12:33 -06:00
xoviat
27cfcbacb8 try uart implementation 2021-01-06 12:12:29 -06:00
xoviat
66622de82a fix set_handler context 2021-01-06 10:49:08 -06:00
xoviat
938919367a
add levels 2021-01-05 17:38:46 -06:00
xoviat
a9d9f3bf80 fix problems 2021-01-05 17:24:27 -06:00
xoviat
7bee584808
remove dead code in waker 2021-01-05 17:19:05 -06:00
xoviat
f62eb66bf2
add new levels 2021-01-05 17:18:24 -06:00
xoviat
9bf09488f1 fix interrupts 2021-01-04 12:48:13 -06:00
xoviat
2ee2d18465 simplify impl. and add interupt idea 2021-01-01 14:59:57 -06:00
xoviat
d5cb9bebaa implement on irqs 2020-12-31 17:59:01 -06:00
xoviat
cc8d162859 begin integrate interrupt 2020-12-31 16:59:42 -06:00
xoviat
cc0076a0eb update hal branch 2020-12-31 16:49:27 -06:00
xoviat
925ede848e rename uarte as serial 2020-12-31 16:40:51 -06:00
xoviat
308756f366 generalize uarte 2020-12-31 16:38:31 -06:00
xoviat
142c01ad01 generalize futures 2020-12-31 16:11:23 -06:00
xoviat
d52e1b2276 use transfer_complete_flag; make partially generic 2020-12-31 15:58:35 -06:00
xoviat
2d979eb4ef add interrupts 2020-12-30 21:14:56 -06:00
xoviat
ea36029a3d reformat 2020-12-30 19:50:15 -06:00
xoviat
a5cf65a17b impl. poll:ready 2020-12-30 19:45:07 -06:00
xoviat
c6cf9b801d minor rework to get tx working (maybe) 2020-12-30 12:27:47 -06:00
xoviat
60c7d112b1 fix borrowing errors 2020-12-30 11:05:52 -06:00
xoviat
41db867d9a fix transfer mutability 2020-12-29 22:57:00 -06:00
xoviat
53c2829eb1 add dma example; rename uarte 2020-12-29 19:10:47 -06:00
xoviat
74b5d4693c implement prelim draft 2020-12-29 12:33:50 -06:00
xoviat
04944b6379 overhaul implementation 2020-12-28 20:48:26 -06:00
xoviat
3cf85df176 add dma transfer example 2020-12-28 16:43:29 -06:00
xoviat
b5e0116f76 add interrupt channels, waker 2020-12-28 13:31:18 -06:00
xoviat
56db0e1c61 add dma transfer logic 2020-12-28 13:13:43 -06:00