Karun
4ea7dfce17
Fix build errors
...
Add empty checks/peripheral busy waits
2024-04-03 16:36:02 -04:00
Karun
80aeea93fd
Configure dual-quad setting by constructor
2024-04-03 16:05:23 -04:00
Karun
b3bbf42b8b
Remove data length from transfer config
...
Remove non hal traits
Fix function comments
2024-04-03 15:58:20 -04:00
Karun
630fd90d26
Address PR comments
2024-04-03 14:01:40 -04:00
Karun
a031b3b79e
Update metapac
2024-04-03 13:42:38 -04:00
Karun
66a7b62909
Add octospi version dependency for max transfer support
2024-04-02 16:24:31 -04:00
Karun
166c95be6c
Update to use private supertrait, following PR#2730
2024-04-02 16:14:10 -04:00
Karun Koppula
9344f55ff3
Merge branch 'main' into karun/main_octospi_implementation
2024-04-02 15:51:50 -04:00
Karun
2caea89b6a
Update build dependency as well
2024-04-02 15:50:57 -04:00
Karun
d62615b536
Update metapac to use PR #442 with octospi rcc updates
2024-04-02 15:48:39 -04:00
Dario Nieuwenhuis
c8936edb6c
stm32/can: simplify bxcan api, merging bx::* into the main structs.
...
The bx::* separate structs (Can, Rx, Tx) and separate `Instance` trait
are a relic from the `bxcan` crate. Remove them, move the functionality
into the main structs.
2024-04-02 11:08:03 +02:00
Tyler Gilbert
cb01d03835
Add async stop() function to stm32 bdma_dma
2024-03-31 16:31:47 -05:00
Corey Schuhen
25618cd93d
RTR fix.
2024-03-28 09:53:30 +10:00
Corey Schuhen
a9f0c8c3a9
Fixes for no-time.
2024-03-28 09:32:13 +10:00
Corey Schuhen
2217b80278
CAN: Unify API's between BXCAN and FDCAN. Use Envelope for all read methods instead of a tuple sometimes.
2024-03-28 09:32:13 +10:00
Corey Schuhen
f5daa50a7b
BXCAN: Add struct that combines Buffered RX and Buffered TX.
2024-03-28 09:32:13 +10:00
Corey Schuhen
41b7e4a434
BXCAN: Create TxMode in order to support buffered TX.
2024-03-28 09:32:13 +10:00
Corey Schuhen
26c739c2f9
BXCAN: Create RxMode enum and move reader methods into it, laying foundations for different Rx buffering modes.
2024-03-28 09:32:13 +10:00
Corey Schuhen
3bdaad39e8
BXCAN: Register access into new Registers struct.
2024-03-28 09:32:13 +10:00
Corey Schuhen
32065d7719
BXCAN: Cut out more that wasn't required from BXCAN crate.
2024-03-28 09:32:08 +10:00
Corey Schuhen
fcfcfce400
CAN: Move some FDCAN definitions into a module to share with BXCAN.
2024-03-28 09:30:58 +10:00
Dario Nieuwenhuis
8f6c07c775
Merge pull request #2745 from de-vri-es/bxcan-keep-rtr-flag
...
embassy_stm32: Preseve the RTR flag in messages.
2024-03-27 22:35:43 +00:00
Maarten de Vries
c059062627
embassy_stm32: Preseve the RTR flag in messages.
2024-03-27 16:10:37 +01:00
Dario Nieuwenhuis
a678b4850c
Merge pull request #2739 from adri326/adri326/nodma-embedded-io
...
Provide embedded_io impls for Uart with and without Dma
2024-03-27 14:47:19 +00:00
Dario Nieuwenhuis
289c5edb9b
Merge pull request #2738 from eZioPan/h5-lse-low-drive
...
stm32 H5: LSE low drive mode is not functional
2024-03-27 14:34:22 +00:00
Emilie Burgun
e3ef7cd99f
Document why embedded_io::Read cannot be implemented for the base Uart
2024-03-27 11:10:16 +01:00
eZio Pan
cf11d28d62
stm32 H5: LSE low drive mode is not functional
2024-03-27 00:55:44 +08:00
Emilie Burgun
1acc34bfaa
Remove the need for TxDma to be a DMA channel in the blocking UartTx impl
2024-03-26 17:45:38 +01:00
Emilie Burgun
402def86ee
Remove ad-hoc fixes for setting the IOSV bit to true
2024-03-26 17:27:02 +01:00
Emilie Burgun
ca998c170f
Missing half of the implementation detail comment
2024-03-26 16:33:41 +01:00
Emilie Burgun
64964bd614
Add a config option to make the VDDIO2 supply line valid
...
On STM32L4[7-A]xx, STM32L5xxx and STM32U5xxx chips, the GPIOG[2..15] pins are only available
once the IOSV bit has been set in PWR->CR2 (U5 chips have the bit in a funkier register).
This is meant to allow the user to have control over this power supply, so the GPIOG pins
are initially insulated, until the user wishes to un-insulate them (or something like that?).
For most applications, though, the VDDIO2 is connected to the VDD line, and this behavior only
gets in the way and causes confusing issues.
This submission adds an option in `embassy_stm32::Config`, called `enable_independent_io_supply`,
which simply enables the IOSV bit. It is only available on chips for which I could find a mention
of IOSV (STM32L4 and STM32L5) or IO2SV (STM32U5).
2024-03-26 16:22:05 +01:00
Dario Nieuwenhuis
2bca875b5f
stm32: use private_bounds for sealed traits.
2024-03-23 01:38:51 +01:00
Dario Nieuwenhuis
389cbc0a77
stm32/timer: simplify traits, convert from trait methods to struct.
2024-03-23 01:37:28 +01:00
Ralf
08e2ba9d74
STM32 BufferedUart: wake receive task for each received byte
...
Fixes https://github.com/embassy-rs/embassy/issues/2719
2024-03-21 08:35:41 +01:00
René van Dorst
92fa49f502
Also fix time_driver.rs
2024-03-20 20:42:03 +01:00
René van Dorst
ab7c767c46
Bump stm32-data to latest tag.
2024-03-20 20:31:02 +01:00
René van Dorst
fb9d42684b
stm32: Fix psc compile error with current stm32-data
...
Commit cc525f1b25
2024-03-20 19:59:17 +01:00
Dario Nieuwenhuis
eca9aac194
Fix warnings in recent nightly.
2024-03-20 16:39:09 +01:00
Dario Nieuwenhuis
3d842dac85
fmt: disable "unused" warnings.
2024-03-20 14:53:19 +01:00
Dario Nieuwenhuis
a2fd4d751e
stm32/gpio: add missing eh02 InputPin for OutputOpenDrain.
2024-03-20 13:49:19 +01:00
Sebastian Goll
cff665f2ec
Avoid unnecessary double-reference
2024-03-20 13:08:42 +01:00
Sebastian Goll
4eb4108952
Fix build for I2C v2 targets
2024-03-20 03:33:15 +01:00
Sebastian Goll
8f19a2b537
Avoid missing stop condition when write/read with empty read buffer
2024-03-20 02:59:30 +01:00
Sebastian Goll
c96062fbcd
Implement blocking transaction handling for I2C v1
2024-03-20 02:59:30 +01:00
Sebastian Goll
7c08616c02
Introduce frame options to control start/stop conditions
2024-03-20 02:55:49 +01:00
Dario Nieuwenhuis
d90abb8ac9
stm32/usb: assert usb clock is okay.
2024-03-19 22:10:59 +01:00
Dario Nieuwenhuis
daa64bd540
stm32/usb: extract common init code.
2024-03-19 22:10:59 +01:00
Dario Nieuwenhuis
530ff9d4d3
stm32/usb: merge usb and usb_otg into single module.
2024-03-19 22:07:16 +01:00
Adam Greig
5a879b3ed1
STM32: SAI: Fix MCKDIV for SAI v3/v4
2024-03-19 02:17:50 +00:00
Dario Nieuwenhuis
6d9f87356b
Merge pull request #2677 from ExplodingWaffle/peri-clock
...
stm32/rcc: wait for peripheral clock to be active. also, hold the peripheral reset while enabling the clock.
2024-03-18 16:23:28 +00:00
