* Chips that have multiple cores will be exposed as chipname_corename,
i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
and pick the first and only core from the list
* Add support for stm32wl55 chip family
Currently this looks up the frequency in the global singleton that must
be initialized by the per-chip RCC implementation. At present, this is
only done for the L0 family of chips.
* Moves the tim2-specific code into macro which always uses TIM2
* For peripherals without clock specified, attempt to locate enable and
reset registers in the RCC block matching the peripheral name. This
could be useful for peripherals where deducing the clock name might
not be feasible, but it remains to be tested with more chip families
to see if it is sufficiently accurate.
Adds RccPeripheral trait for peripherals implementing clock enable and reset for a given peripheral.
Add macro table generting implementations of RccPeripheral for peripherals with clock set, currently restricted to SPI.
